Hybrid MBC Transistor Layout for Speed-Current Tradeoffs
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Solution Overview
Problem
Existing multi-gate MOSFETs, such as MBC transistors, face challenges in achieving optimal performance for both high-speed and high-current applications due to variations in channel member configurations, which affect parasitic capacitance and on-state current.
Innovation Solution
A method for forming hybrid semiconductor devices with MBC transistors having different numbers of channel members, involving selective ion implantation, epitaxial deposition of channel and sacrificial layers, and patterning to create fin-shaped structures, allowing for tailored transistor configurations suitable for specific applications.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Power
If MBC transistors are designed with more channel members to increase on-state current, then high-current application performance is improved, but parasitic capacitance increases and high-speed performance deteriorates
Solution Approach 1:
The semiconductor device is divided into first and second regions, each containing MBC transistors with different numbers of channel members. The first region contains transistors with fewer channel members optimized for high-speed applications, while the second region contains transistors with more channel members optimized for high-current applications. This segmentation allows the device to simultaneously support both high-speed and high-current requirements without the parasitic capacitance of one type affecting the performance of the other.
2Speed
If MBC transistors are designed with fewer channel members to reduce parasitic capacitance, then high-speed application performance is improved, but on-state current decreases
Solution Approach 1:
Different regions of the semiconductor device are assigned different transistor configurations tailored to local performance requirements. The first region is optimized with fewer channel members for high-speed switching, while the second region is optimized with more channel members for high-current handling. This local quality approach ensures that each region performs optimally for its intended application without compromising overall device functionality.
3Device complexity
If a single MBC transistor configuration is used, then device complexity is reduced, but adaptability to different applications deteriorates
Solution Approach 1:
The semiconductor device achieves multi-functionality by integrating two types of MBC transistors with different channel member configurations within a single device structure. This allows the device to serve multiple application purposes - both high-speed switching and high-current handling - without requiring separate devices. The universal design enables the same substrate to support diverse transistor configurations optimized for different functional requirements.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
Enables the formation of transistors with improved performance characteristics, where 2-channel-member transistors excel in high-speed AC applications and 3-channel-member transistors in high-current applications, by managing parasitic capacitance and on-state current effectively.
Implementation Method 1
selective ion implantation
Implementation Method 2
epitaxial deposition of channel and sacrificial layers
Data Source
AI summary
Semiconductor devices and method of forming the same are provided. In one embodiment, a semiconductor device includes a first transistor and a second transistor. The first transistor includes two first source/drain features and a first number of nanostructures that are stacked vertically one over another and extend lengthwise between the two first source/drain features. The second transistor includes two second source/drain features and a second number of nanostructures that are stacked vertically one over another and extend lengthwise between the two second source/drain features.