Hybrid Internal Memory Bandwidth Control for Multi-Core Processors
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Solution Overview
Problem
The increasing number of processor cores and computing speed in multi-core processors is outpacing the access speed and capacity of internal memory, leading to a 'memory wall' issue, where larger storage capacity results in lower access speed and higher latency, hindering overall system performance.
Innovation Solution
A hybrid internal memory system utilizing multiple types of memory media, such as DRAM and SCM, is managed by a processor to dynamically adjust bandwidth allocation based on occupancy rates and application requirements, ensuring sufficient bandwidth for each core through data migration and bandwidth control policies.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If the storage capacity of internal memory is increased to meet the demands of multi-core processors, then the memory capacity is improved, but the access speed decreases and latency increases
Solution Approach 1:
The patent segments the internal memory into multiple types (e.g., high-speed memory and large-capacity memory) with different performance characteristics. Each memory type is independently managed and allocated to processor cores based on specific needs, allowing the system to simultaneously achieve high capacity and high speed by accessing appropriate memory segments.
Solution Approach 2:
Different regions or types of memory are assigned different quality characteristics (speed vs. capacity). The system dynamically selects which memory region to access based on the specific access requirements, ensuring that critical data is retrieved from high-speed memory while bulk storage utilizes large-capacity memory, thus resolving the speed-capacity tradeoff.
2Quantity of substance
If multiple types of storage media are used to increase internal memory capacity, then the storage capacity is improved, but the overall access speed of internal memory decreases
Solution Approach 1:
The patent implements dynamic bandwidth allocation and data migration mechanisms that adaptively adjust memory access patterns in real-time. The system monitors memory usage patterns and dynamically migrates data between different memory types, allocating bandwidth preferentially to high-speed memory when performance is critical, thus maintaining high overall access speed while utilizing multiple memory types for increased capacity.
Solution Approach 2:
The patent introduces a memory management mechanism that acts as an intermediary between the processor and multiple storage media. This intermediary intelligently routes access requests to appropriate memory types, manages data migration between them, and balances bandwidth allocation, thereby harmonizing the performance characteristics of different memory types to maintain high overall access speed while achieving increased capacity.
3Quantity of substance
If bandwidth is allocated to system-oriented applications for data migration, then the memory capacity utilization is improved, but the bandwidth available for user-oriented applications decreases
Solution Approach 1:
The patent implements periodic or scheduled data migration between memory types rather than continuous migration. During designated migration periods, bandwidth is allocated to system-oriented applications for bulk data movement. During operational periods, bandwidth is prioritized for user-oriented applications. This periodic approach ensures that both capacity utilization and application performance requirements are met without continuous conflict.
Solution Approach 2:
The patent employs dynamic bandwidth allocation that adjusts the proportion of bandwidth allocated to system-oriented versus user-oriented applications based on real-time system state. When data migration is urgent, more bandwidth is allocated to migration tasks. When applications require performance, bandwidth is reallocated to them. This dynamic adjustment resolves the contradiction by making bandwidth allocation flexible rather than fixed.
Data Source
AI summary
A method for controlling an internal memory bandwidth includes after obtaining a bandwidth required by a to-be-accessed internal memory medium, a processor in a system obtains an occupancy rate of an internal memory bandwidth of the to-be-accessed internal memory medium. If determining, based on the occupancy rate of the internal memory bandwidth, that the to-be-accessed internal memory medium cannot satisfy a bandwidth requirement, the processor adjusts, under an indication of a bandwidth adjustment policy, the occupancy rate of the internal memory bandwidth based on a factor that affects the occupancy rate of the internal memory bandwidth of the to-be-accessed internal memory medium, and the processor uses a first bandwidth that satisfies the bandwidth requirement in an adjusted remaining bandwidth of the to-be-accessed internal memory medium.