Hybrid Memory Capacitor With Threshold Switching for Leakage Control
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Solution Overview
Problem
As semiconductor memory devices, such as DRAM devices, become more highly integrated, they experience an increase in leakage current, which degrades their reliability by affecting refresh characteristics and retention characteristics, and also increases power consumption.
Innovation Solution
A semiconductor memory device with a hybrid capacitor is developed, featuring a control element with a switching material layer containing a chalcogen compound and a cell capacitor connected in series. The control element controls current flow by changing resistance based on applied voltage, while the cell capacitor functions as a storage node. This configuration reduces leakage current by isolating the cell capacitor from the cell transistor during standby mode.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If semiconductor memory devices are highly integrated to increase capacity, then integration density improves, but leakage current increases
Solution Approach 1:
The capacitor is segmented into two distinct functional parts: a control element (with switching material layer) and a storage element (cell capacitor), connected in series. This segmentation allows the control element to actively manage current flow while the storage element maintains data, thereby reducing leakage current without compromising integration density.
Solution Approach 2:
The control element incorporates a switching material layer that dynamically changes its resistance state based on applied voltage. When a threshold voltage is applied, the switching material transitions from a high-resistance state to a low-resistance state, enabling active control of current flow to prevent leakage while maintaining high integration density.
2Productivity
If high integration density is achieved, then device capacity increases, but reliability degrades due to increased leakage current
Solution Approach 1:
By dividing the capacitor into control and storage elements, the patent isolates the source of leakage current to the control element while protecting the storage element. This segmentation ensures that even at high integration densities, the storage element maintains stable charge retention, thereby improving refresh characteristics and reliability.
Solution Approach 2:
The control element acts as an intermediary between the bit line and the storage element. It mediates current flow by switching between high and low resistance states, preventing direct leakage paths to the storage element while enabling controlled charge transfer during write operations, thus maintaining reliability at high integration densities.
3Object-generated harmful factors
If control element is added to reduce leakage current, then leakage current decreases, but device complexity increases
Solution Approach 1:
The control element and cell capacitor are merged into a single hybrid capacitor structure connected in series, sharing common electrodes and interlayer insulating layers. This merging approach reduces the overall device complexity compared to implementing separate control circuits, while still achieving leakage current reduction through the switching material layer's resistance control.
4Ease of operation
If switching material layer with chalcogen compound is used, then current control capability improves, but manufacturing process complexity increases
Solution Approach 1:
The patent utilizes parameter changes in the switching material layer's resistance based on applied voltage to achieve current control. By changing the electrical parameter (resistance) of the existing switching material rather than adding new materials or complex processes, the patent improves current control capability while minimizing manufacturing process complexity.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution effectively reduces leakage current, thereby improving the refresh characteristics and retention characteristics of the semiconductor memory device, while maintaining high integration density and capacity without increasing power consumption.
Implementation Method 1
a control element electrically connected to the second impurity region and configured to control the flow of current by changing a resistance thereof according to the magnitude of an applied voltage
Implementation Method 2
a cell capacitor connected in series to the control element and functioning as a storage node configured to store charges
Implementation Method 3
a capacitor dielectric layer provided on the second electrode and including a high-k dielectric material having a dielectric constant higher than that of silicon oxide
Data Source
AI summary
A semiconductor memory device having a hybrid capacitor includes a cell transistor including a gate structure provided on a substrate, and a first impurity region and a second impurity region disposed on the substrate at both sides of the gate structure, a bit line structure electrically connected to the first impurity region, and a hybrid capacitor including a control element electrically connected to the second impurity region and configured to control the flow of current by changing a resistance thereof according to a magnitude of an applied voltage, and a cell capacitor connected in series to the control element and functioning as a storage node configured to store charges, wherein the control element includes a first electrode, a switching material layer, and a second electrode, and the cell capacitor includes the second electrode, a capacitor dielectric layer, and a third electrode.