Hybrid Volatile Nonvolatile Memory Cell Arrays for Power Speed Tradeoff
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Solution Overview
Problem
Dynamic memory devices require frequent refresh operations to prevent data loss, which consumes a significant amount of power, while non-volatile memory devices struggle to match the operating speed of volatile devices.
Innovation Solution
A memory device is designed with a combination of volatile and non-volatile memory cell arrays, where volatile DRAM cells are used for high-speed operations and non-volatile FeRAM cells are used for data storage, with transfer switches connecting the two arrays to reduce the need for refresh operations and conserve power.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If dynamic memory devices are used for high operating speed, then speed is improved, but power consumption increases due to frequent refresh operations
Solution Approach 1:
The memory device is divided into two distinct memory cell arrays: a first memory cell array with volatile memory cells (DRAM) for high-speed operations, and a second memory cell array with non-volatile memory cells (FeRAM) for data storage. This segmentation allows each type of memory cell to perform its specialized function, achieving high speed when needed while reducing power consumption during data retention.
Solution Approach 2:
Transfer switches are introduced as intermediary components connecting the first and second memory cell arrays. These transfer switches enable data to be moved from the volatile memory cells to the non-volatile memory cells, allowing the system to maintain high operating speed during active use while periodically transferring data to reduce refresh operations and power consumption.
2Reliability
If non-volatile memory devices are used for data storage, then data retention is improved, but operating speed deteriorates
Solution Approach 1:
The memory system is segmented into volatile memory cells optimized for high-speed operations and non-volatile memory cells optimized for data retention. The volatile memory cells provide fast read/write operations, while the non-volatile memory cells ensure data is not lost during power cycles. This segmentation resolves the contradiction by allowing each memory type to operate in its optimal performance range.
Solution Approach 2:
Data is proactively transferred from the volatile memory cell array to the non-volatile memory cell array during idle periods or before anticipated power interruptions. This preliminary action ensures that important data is securely stored in the non-volatile memory before it is needed again, maintaining data retention without impacting the operating speed when the data is actually accessed.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration maintains high operating speed while significantly reducing power consumption by eliminating the need for frequent refresh operations and enhancing data retention.
Implementation Method 1
a ferroelectric layer disposed between the second wordline and the second channel region
Implementation Method 2
a capacitor connected to the cell switch
Data Source
AI summary
A memory device includes a substrate including first and second regions, the first region having first wordlines and first bitlines, and the second region having second wordlines and second bitlines, a first memory cell array including first memory cells in the first region, the first memory cell array having volatility, and each of the first memory cells including a cell switch having a first channel region adjacent to a corresponding first wordline of the first wordlines, and a capacitor connected to the cell switch, and a second memory cell array including second memory cells in the second region, the second memory cell array having non-volatility, and each of the second memory cells including a second channel region adjacent to a corresponding second wordline of the second wordlines, and a ferroelectric layer between the corresponding second wordline of the second wordlines and the second channel region.