Hybrid Memory Controller Segmentation for Data Access
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Solution Overview
Problem
Current storage devices, particularly those using NAND flash memory with Triple Level Cells (TLCs), face limitations in programming time, wear leveling operations, and unsuitability for fast data retrieval, making them inadequate for applications requiring rapid access to cold data.
Innovation Solution
A dual-mode memory controller system that includes a processing unit and interface capable of accessing both volatile and non-volatile hybrid memory types, allowing for reconfiguration between different operating modes to optimize data access across various storage units, including flash and DRAM, enhancing data retrieval speed and storage capacity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If TLCs are used for storing huge data, then storage capacity is improved, but programming time increases
Solution Approach 1:
The storage system is segmented into multiple types of storage units (TLCs, SLCs, DRAM) with different characteristics. Each type handles different data access patterns, allowing the system to achieve high storage capacity while maintaining fast programming speeds for frequently accessed data through parallel access to multiple storage types.
2Quantity of substance
If only TLCs are used, then storage space is increased, but application flexibility deteriorates
Solution Approach 1:
The memory controller is designed with multi-functionality to manage different types of storage units (TLCs, SLCs, DRAM) through a unified interface. This allows the system to provide diverse application scenarios including fast data retrieval, cold data storage, and wear leveling operations, making it adaptable to various application requirements while maintaining large storage space.
3Quantity of substance
If TLCs are used for mass storage, then storage density is improved, but wear leveling operation time increases
Solution Approach 1:
DRAM is introduced as an intermediary buffer between the host and TLCs. Frequently accessed data is cached in DRAM, reducing the number of write operations to TLCs and thereby reducing wear leveling operation time. The memory controller manages data movement between DRAM and TLCs, providing fast data retrieval while maintaining storage density.
4Device complexity
If a single type of storage unit is used, then device complexity is reduced, but data access performance deteriorates
Solution Approach 1:
The system dynamically switches between different storage units based on data access patterns. The memory controller monitors access frequency and automatically routes frequently accessed data to faster storage media (DRAM, SLCs) while storing less frequently accessed data in high-capacity TLCs. This dynamic adaptation provides fast data access performance without requiring a complex static architecture.
Data Source
AI summary
The invention introduces an apparatus for controlling different types of storage units, at least including: an interface and a processing unit. The interface connects at least two types of storage units, which include at least a nonvolatile hybrid memory. The processing unit is configured to operably access data to the different types of storage units through the interface.