Hybrid Memory Controller Diverts Traffic to Reduce Latency

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Solution Overview

Problem

Computing systems face performance degradation due to frequent exceptions and over-utilization of physical memory resources, particularly when executing repetitive instructions and managing virtual memory, leading to increased read/write times and processing resource consumption.

Innovation Solution

A hybrid memory system is introduced, comprising different types of memory resources such as 3D Xpoint non-volatile memory and flash memory, where a controller selectively diverts instructions and command traffic based on sensitivity, mapping logical block addresses to optimize access patterns and alleviate memory bottlenecks by using emerging non-volatile memory for high-access and low-latency operations.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Quantity of substance

If physical memory resources are over-utilized to handle virtual memory operations, then memory capacity is improved, but processing time and system performance deteriorate due to frequent exceptions and memory bottlenecks

Engineering Contradiction:
Improvememory capacityVSAvoidprocessing time
Core Design Contradiction:
Quantity of substanceVSLoss of time

Solution Approach 1:

The memory system is segmented into multiple types of memory resources (e.g., volatile memory, non-volatile memory, cache memory) organized in a hierarchical structure. Each memory type handles specific workloads based on access patterns, allowing the system to maintain large total capacity while ensuring frequently accessed data resides in faster memory segments, thus reducing processing time delays.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

A memory controller acts as an intermediary between the host and various memory resources, intelligently routing read/write operations to appropriate memory types based on data characteristics and access patterns. This mediator optimizes the balance between utilizing large memory capacity and maintaining fast access speeds by preventing bottlenecks at any single memory layer.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Speed

If volatile memory is used for high-speed access, then read/write speed is improved, but data persistence and reliability worsen due to power dependency

Engineering Contradiction:
Improveread/write speedVSAvoiddata persistence
Core Design Contradiction:
SpeedVSReliability

Solution Approach 1:

The system merges volatile memory (for speed) and non-volatile memory (for persistence) into a unified hybrid memory architecture. Frequently accessed data is stored in volatile memory for rapid read/write operations, while the same data is simultaneously maintained in non-volatile memory for persistence. This combination allows the system to achieve both high speed and data reliability without compromising either property.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The system dynamically changes the state parameters of memory resources by transitioning data between different memory types based on access patterns and power states. When power is available, data is maintained in volatile memory for speed; when power is lost or during shutdown, data is automatically transferred to non-volatile memory for persistence, thus adapting to changing conditions to maintain both speed and reliability.

Inventive Principle:
Principle #35Parameter changes

3Reliability

If non-volatile memory is used for data storage, then data persistence is improved, but access latency and processing speed worsen

Engineering Contradiction:
Improvedata persistenceVSAvoidaccess latency
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The system performs preliminary actions by pre-loading data from non-volatile memory into volatile memory or cache memory before it is actually needed for processing. Based on predictive algorithms analyzing access patterns, frequently accessed data is transferred in advance to faster memory layers, ensuring that when the data is needed, access latency is minimized while still maintaining the persistence benefits of non-volatile storage.

Inventive Principle:
Principle #10Preliminary action

4Device complexity

If a unified memory structure is used, then device complexity is reduced, but adaptability to different workloads worsens

Engineering Contradiction:
Improvememory structure complexityVSAvoidworkload adaptability
Core Design Contradiction:
Device complexityVSAdaptability or versatility

Solution Approach 1:

The memory system implements dynamic allocation and management of different memory types based on workload characteristics. The memory controller continuously monitors access patterns, data types, and performance requirements, dynamically adjusting which memory resources are allocated to which workloads. This dynamic approach allows a single unified memory structure to adapt to diverse workloads (e.g., sequential access, random access, read-intensive, write-intensive) without requiring multiple specialized memory systems, thus maintaining low complexity while achieving high adaptability.

Inventive Principle:
Principle #15Dynamics

Data Source

PatentEP3769202B1Hybrid memory system
Publication Date: 2023.09.13 MICRON TECHNOLOGY INC
  • EP3769202B1 patent drawingFigure 1
  • EP3769202B1 patent drawingFigure 2
  • EP3769202B1 patent drawingFigure 3A~3C

AI summary

An example apparatus comprises a hybrid memory system and a controller coupled to the hybrid memory system. The controller may be configured to cause data to be selectively stored in the hybrid memory system responsive to a determination that an exception involving the data has occurred.