Hybrid Memory Device Integrating Flash and DRAM Transistors
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Current memory devices, such as DRAMs and flash memories, face challenges in integration and performance due to differing structures and operation methods, with DRAMs having high speed but difficulty in size reduction and flash memories having large storage capacity but slow operation speed, as device scaling progresses and integration limits are reached.
Innovation Solution
A hybrid memory device is developed, combining transistors with ferroelectric and high-k materials to operate as both flash memory and DRAM, allowing for increased integration by sharing substrates and insulating layers, and utilizing voltages to generate polarization switching and excess holes for data storage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If DRAM cell size is reduced to increase integration, then integration density improves, but capacitor size reduction becomes difficult and manufacturing complexity increases
Solution Approach 1:
The patent combines flash memory and DRAM into a hybrid memory device where both memory types share common structures (substrate, insulating layers, transistor components). This merging allows increased integration density without proportionally increasing manufacturing complexity, as the shared structures are manufactured using unified processes.
Solution Approach 2:
The hybrid memory device performs multiple functions within a single structure: it provides non-volatile storage (flash memory function) and volatile high-speed storage (DRAM function) simultaneously. This multi-functionality increases the effective storage capacity and performance without requiring separate dedicated structures for each memory type.
2Quantity of substance
If flash memory is used for large storage capacity, then storage capacity increases, but operation speed deteriorates
Solution Approach 1:
The patent merges flash memory and DRAM cells into a hybrid structure where both memory types coexist and can be accessed independently. This allows the system to leverage the large storage capacity of flash memory while simultaneously utilizing the high operation speed of DRAM for frequently accessed data, thus resolving the speed-capacity trade-off.
Solution Approach 2:
The hybrid memory device segments storage into different functional regions: flash memory cells for non-volatile large-capacity storage and DRAM cells for volatile high-speed storage. This segmentation allows data to be distributed across different memory types based on access requirements, achieving both large capacity and high speed for different data sets.
3Quantity of substance
If device scaling progresses to increase integration, then integration density improves, but device characteristics deteriorate
Solution Approach 1:
The patent applies different material properties and structural configurations to different regions of the hybrid memory device: flash memory cells use ferroelectric materials for non-volatile storage while DRAM cells use high-k materials for volatile storage. This local differentiation of material quality allows each region to be optimized for its specific function while maintaining overall device reliability despite scaling.
Solution Approach 2:
The hybrid memory device employs composite material structures combining ferroelectric materials (for flash memory) and high-k materials (for DRAM) within the same device architecture. These composite materials provide the necessary electrical and physical properties for both memory types to function reliably at scaled dimensions, preventing characteristic deterioration.
4Reliability
If separate manufacturing processes are used for DRAM and flash memory, then device performance is optimized, but manufacturing complexity increases
Solution Approach 1:
The patent merges the manufacturing processes for flash memory and DRAM into a unified hybrid memory fabrication process. Both memory types share common manufacturing steps including substrate preparation, insulating layer formation, and transistor structure creation. This process integration reduces manufacturing complexity while maintaining the performance optimization of both memory types through selective material and structure configuration.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The hybrid memory device achieves high integration, combining the large storage capacity of flash memory with the high operation speed of DRAM, while reducing manufacturing complexity and addressing scaling limitations.
Implementation Method 1
a voltage, which is greater than or equal to a level generating polarization switching of the ferroelectric material, is applied to the first gate electrode
Implementation Method 2
a voltage, which has a level sufficient to generate an excess hole in the second channel region, is applied to a drain of the second transistor
Data Source
AI summary
A hybrid memory device includes a first transistor including a first channel region, a first gate electrode facing and spaced apart from the first channel region, and a first memory layer arranged between the first channel region and the first gate electrode, and a second transistor including a second channel region including a same material as the first channel region, a second gate electrode facing and spaced apart from the second channel region, and a second memory layer arranged between the second channel region and the second gate electrode, wherein the hybrid memory device is used as a highly integrated memory system by two transistors that are formed on a same substrate and operate as different types of memories.