Hybrid Memory Cell Combining Floating-Body and Resistive Storage
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Current semiconductor memory devices either lack the fast operation of volatile memories or the data retention of non-volatile memories, with non-volatile devices operating slower than volatile ones, and there is a need for a universal memory device that combines both functionalities without increasing size significantly.
Innovation Solution
A semiconductor memory cell incorporating a capacitorless transistor with a floating body and a bipolar resistive change element, utilizing materials like transition metal oxides, ferroelectric, or ferromagnetic materials, to store data both volatily and non-volatilely, allowing for fast operation and data retention.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Duration of action of stationary object
If non-volatile memory devices are used, then data retention is improved, but operation speed deteriorates
Solution Approach 1:
The patent merges volatile memory (capacitorless transistor with floating body) and non-volatile memory (bipolar resistive change element) into a single hybrid memory cell. The volatile component provides fast operation speed while the non-volatile component ensures data retention, resolving the contradiction between speed and data retention by combining both memory types in one device structure.
2Adaptability or versatility
If hybrid memory structure is implemented, then both volatile and non-volatile functionality are achieved, but device size increases
Solution Approach 1:
The patent implements a nested structure where the bipolar resistive change element is positioned directly above the floating body region of the capacitorless transistor, with both components sharing common diffusion regions (first and second regions). This vertical stacking and sharing of structures allows the hybrid memory cell to achieve both volatile and non-volatile functionality while minimizing the lateral area occupied by the device.
3Speed
If fast write access is required, then volatile memory is used, but data retention capability is lost
Solution Approach 1:
The hybrid memory cell combines the fast write access capability of the capacitorless transistor (picosecond to nanosecond range) with the data retention capability of the bipolar resistive change element. The transistor enables rapid data writing while the resistive change element maintains data persistence, allowing the device to achieve both fast write access and data retention simultaneously.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution enables a memory device that operates as quickly as volatile memories while retaining data when power is discontinued, achieving a balance between speed and data persistence without excessive size increase.
Implementation Method 1
A non-volatile memory element, such as a bipolar resistive change element, is positioned above one of the regions having second conductivity type. Examples of resistive change material includes bipolar resistive memory element, such as transition metal oxides, ferroelectric, and ferromagnetic materials.
Implementation Method 2
the volatile memory portion, which includes a capacitorless transistor with a floating body
Data Source
AI summary
A semiconductor memory cell including a capacitorless transistor having a floating body configured to store data as charge therein when power is applied to the cell, and a non-volatile memory comprising a bipolar resistive change element, and methods of operating.