Hybrid Memory Data Recovery via High-Temperature Migration

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Solution Overview

Problem

Emerging nonvolatile memories, such as resistive memories, are susceptible to data retention and corruption issues due to high temperatures and electromagnetic interference, leading to system crashes, data corruption, and security vulnerabilities.

Innovation Solution

A memory system is configured with a resistive nonvolatile memory array and a transistor-based nonvolatile memory array, where data is transferred between the two before and after a high-temperature event, using a memory controller to write data from the resistive array to the transistor-based array as backup storage, and vice versa, to mitigate data corruption and systematic drift.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If resistive nonvolatile memory is used for data storage, then write endurance and speed are improved, but data retention and reliability deteriorate under high-temperature conditions

Engineering Contradiction:
Improvewrite speedVSAvoiddata retention
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

A memory management unit (MMU) is introduced as an intermediary component that mediates between the resistive nonvolatile memory and the host system. The MMU detects high-temperature conditions and automatically manages data migration to transistor-based memory, protecting the system from temperature-induced data corruption while maintaining the performance benefits of resistive memory.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The system performs preliminary actions by detecting temperature conditions and proactively migrating data before corruption occurs. The MMU continuously monitors temperature and preemptively transfers data from resistive to transistor-based memory when high temperatures are detected, preventing data retention issues before they manifest.

Inventive Principle:
Principle #10Preliminary action

2Reliability

If data is continuously backed up between memory types, then data integrity is improved, but system complexity increases

Engineering Contradiction:
Improvedata integrityVSAvoidmemory management complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The memory management unit operates autonomously to manage data migration between memory types. It self-monitors temperature conditions, automatically determines when migration is necessary, and executes data transfers without host system intervention. This self-service approach maintains data integrity while minimizing the complexity burden on the host system.

Inventive Principle:
Principle #25Self-service

Solution Approach 2:

The memory management unit serves multiple functions: it acts as a temperature sensor, a data migration controller, and a buffer between different memory types. By consolidating these functions into a single universal component, the system achieves robust data protection without proportionally increasing overall system complexity.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentEP3098814B1Methods and systems for nonvolatile memory data management
Publication Date: 2019.01.09 WINBOND ELECTRONICS CORP
  • EP3098814B1 patent drawingFigure 1
  • EP3098814B1 patent drawingFigure 2
  • EP3098814B1 patent drawingFigure 3

AI summary

A system includes a first resistive nonvolatile memory array, a second transistor-based nonvolatile memory array and a memory controller. The memory controller is configured to write data of the first resistive nonvolatile memory array together with an indicator bit to the second transistor-based nonvolatile memory array, determine whether the indicator bit is valid in response to a power up of the system after a high-temperature event, a received command after a high-temperature event, a predetermined number of power ups, or a power up or received command after each of a predetermined number of high-temperature events and write back the data stored in the second transistor-based nonvolatile memory array to the first resistive nonvolatile memory array when the indicator bit is valid.