Hybrid DRAM-SRAM Memory With In-Memory Processing
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Solution Overview
Problem
In Von Neumann structures, the computing speed is hindered by data transfer times between memory and computing devices, especially during large computations like artificial neural network operations.
Innovation Solution
A semiconductor memory device with a hybrid structure incorporating DRAM and SRAM cell arrays and an integrated processing unit, allowing computations to be performed directly within the memory device, reducing the need for data transfer by storing data directly in a lower integration SRAM array and performing computations using it.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If data is stored in separate memory devices using Von Neumann structure, then data storage capacity is improved, but computing speed deteriorates due to data transfer time between memory and computing devices
Solution Approach 1:
The patent merges memory storage and computing processing into a single integrated device. The memory device includes memory cells for data storage and a processing unit for performing computations directly on the stored data, eliminating the need for separate memory and computing devices and the data transfer between them.
Solution Approach 2:
The processing unit acts as an intermediary component within the memory device that enables direct computation on stored data. This intermediary allows the memory device to perform both storage and processing functions, bridging the gap between memory and separate computing devices.
2Device complexity
If data is transferred between memory device and computing device, then data storage and processing are separated, but power consumption increases due to frequent data read/write operations
Solution Approach 1:
The patent combines storage and processing functions within the same device to eliminate repeated data transfers. The processing unit is integrated with the memory cells, allowing computations to be performed directly on stored data without reading and writing to external computing devices, thereby reducing power consumption.
3Device complexity
If computations are performed externally to memory device, then memory structure remains simple, but data transfer time increases
Solution Approach 1:
The patent integrates a processing unit directly within the memory device structure. This processing unit can perform computations on data stored in the memory cells without requiring data to be transferred to external computing devices, thereby eliminating data transfer time while maintaining a relatively simple integrated structure.
Solution Approach 2:
The patent adds a processing dimension to the traditional memory structure by incorporating a processing unit within the memory device. This dimensional addition allows the memory device to perform both storage and computation functions, transforming it from a passive storage device to an active processing-storage hybrid.
Data Source
AI summary
The present disclosure relates to a semiconductor memory device and a memory system including the same, and the semiconductor memory device includes a substrate, a plurality of banks including a first bank including a first memory cell array including a DRAM cell and a second bank including a second memory cell array including an SRAM cell, a peripheral circuit between the plurality of banks, and a processing unit adjacent to the second memory cell array.