Hybrid Memory Module With Local Controller Managing DRAM Cache

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Solution Overview

Problem

Existing memory systems struggle to efficiently manage the disparate access granularities of DRAM and flash memory, leading to increased memory transactions and data flow external to flash memory components.

Innovation Solution

A memory module with a local controller that manages communication between a DRAM cache and flash memory, utilizing a dual-cache architecture with direct and multi-set caches to accommodate different access granularities and reduce memory transactions.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If a single memory type is used, then the system is simple to manage, but it cannot simultaneously provide both high speed and large capacity at low cost

Engineering Contradiction:
Improvememory access speedVSAvoidmemory architecture complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The patent combines DRAM and flash memory into a single hybrid memory module, merging the high-speed access characteristics of DRAM with the high-capacity, low-cost characteristics of flash memory. This allows the system to simultaneously achieve both speed and capacity benefits while presenting a unified interface to the host system.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The memory module is segmented into distinct DRAM and flash memory regions, each optimized for specific functions. The controller segments memory management tasks by determining whether to serve requests from the fast DRAM cache or the high-capacity flash memory, enabling differentiated handling of different data types and access patterns.

Inventive Principle:
Principle #1Segmentation

2Speed

If DRAM cache is used to service flash memory, then access speed improves, but the number of memory transactions increases due to disparate access granularities

Engineering Contradiction:
Improvememory access speedVSAvoidmemory transaction efficiency
Core Design Contradiction:
SpeedVSProductivity

Solution Approach 1:

The controller dynamically adjusts the access granularity and transaction size based on the specific memory request and data characteristics. It can flexibly switch between servicing individual cache lines from DRAM and larger block transfers from flash memory, optimizing the balance between access speed and transaction efficiency for each operation.

Inventive Principle:
Principle #15Dynamics

3Quantity of substance

If flash memory is directly accessed, then large capacity and low cost are achieved, but access speed and durability are reduced

Engineering Contradiction:
Improvememory capacityVSAvoidmemory access speed
Core Design Contradiction:
Quantity of substanceVSSpeed

Solution Approach 1:

The system performs preliminary actions by pre-loading frequently accessed data from flash memory into the DRAM cache before actual access occurs. This anticipatory caching strategy ensures that hot data is already in the fast DRAM when needed, eliminating the speed penalty of direct flash access while maintaining the capacity advantages of flash storage.

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS12213548B2Hybrid memory module
Publication Date: 2025.02.04 RAMBUS INC
  • US12213548B2 patent drawing
  • US12213548B2 patent drawing
  • US12213548B2 patent drawing

AI summary

A memory module includes cache of relatively fast and durable dynamic, random-access memory (DRAM) in service of a larger amount of relatively slow and wear-sensitive non-volatile memory. Local controller manages communication between the DRAM cache and non-volatile memory to accommodate disparate access granularities, reduce the requisite number of memory transactions, and minimize the flow of data external to nonvolatile memory components.