Die-Stacked Hybrid Memory Page Migration Manager
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Solution Overview
Problem
Conventional memory page migration processes in processing systems require significant resource consumption and stalling of other processes due to the involvement of the host processor and system software, leading to inefficiencies in resource allocation and memory bus bandwidth.
Innovation Solution
A die-stacked hybrid memory device with a page migration manager that facilitates intra-memory page transfers between different memory types, reducing latency and power consumption by offloading page migration management and allowing autonomous or software-initiated migrations, thereby improving processing efficiency and memory wear leveling.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If page migration is orchestrated by the host processor through DMA engines or load/store instructions, then memory pages can be migrated between different memories, but it consumes significant host processor resources and memory bus bandwidth
Solution Approach 1:
The patent extracts the page migration function from the host processor by implementing a dedicated page migration manager within the memory subsystem. This separate migration manager handles page migration operations independently, freeing the host processor from this task and eliminating the consumption of host processor resources and memory bus bandwidth that would otherwise be required for migration operations.
Solution Approach 2:
The patent introduces a page migration manager as an intermediary component between the host processor and the memory subsystem. This migration manager acts as a mediator that handles page migration operations, allowing the host processor to focus on its primary computational tasks while the migration manager manages the complexity of page migration between different memory types.
2Reliability
If the host processor and system software orchestrate page migration, then address translation information can be maintained, but it causes stalling of other processes and taxes system software efficiency
Solution Approach 1:
The patent extracts the page migration orchestration function from the host processor and system software, implementing it instead within the memory subsystem through a dedicated page migration manager. This allows address translation information to be maintained while eliminating the stalling of other processes, as migration operations no longer require host processor intervention.
Solution Approach 2:
The patent enables the memory subsystem to serve itself by implementing autonomous page migration capabilities within the migration manager. The migration manager can independently make migration decisions and execute migration operations without requiring system software intervention, thereby maintaining address translation information while avoiding process stalling and preserving system software efficiency.
3Reliability
If page migration requires reading contents into the host processor and writing out to destination, then pages can be moved between memories, but it consumes significant memory bus bandwidth
Solution Approach 1:
The patent extracts the page migration data path from the host processor and memory bus by implementing direct page transfer capabilities within the memory subsystem. The page migration manager enables pages to be moved between different memory types through internal memory subsystem pathways, eliminating the need to read contents into the host processor and write them back out, thereby significantly reducing memory bus bandwidth consumption.
4Reliability
If conventional approaches require system software to make migration decisions and maintain address translation, then page migration can be controlled, but it taxes the efficiency of system software
Solution Approach 1:
The patent extracts the page migration decision-making and control functions from the system software by implementing them within the page migration manager in the memory subsystem. This allows migration control to be maintained through hardware-based policies and configurations, while system software is freed from the computational burden of making migration decisions and maintaining address translation information.
Solution Approach 2:
The patent enables the memory subsystem to autonomously manage page migration through the migration manager, which can independently make migration decisions based on configured policies and maintain address translation information. This self-service capability preserves migration control while eliminating the need for system software intervention, thereby improving system software efficiency.
Data Source
AI summary
A die-stacked hybrid memory device implements a first set of one or more memory dies implementing first memory cell circuitry of a first memory architecture type and a second set of one or more memory dies implementing second memory cell circuitry of a second memory architecture type different than the first memory architecture type. The die-stacked hybrid memory device further includes a set of one or more logic dies electrically coupled to the first and second sets of one or more memory dies, the set of one or more logic dies comprising a memory interface and a page migration manager, the memory interface coupleable to a device external to the die-stacked hybrid memory device, and the page migration manager to transfer memory pages between the first set of one or more memory dies and the second set of one or more memory dies.