Hybrid Memory Module Power Management for Catastrophic Event Backup

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Solution Overview

Problem

Modern computer systems face challenges in managing increasing data volumes and power consumption, requiring innovative solutions for memory modules that can efficiently store and retrieve data while ensuring data integrity and security, especially during catastrophic events.

Innovation Solution

A hybrid memory module combining volatile and non-volatile memory with a power management unit and registering clock driver, which initiates backup operations and provides persistent memory functionality, optimizing power usage and reducing motherboard complexity by simplifying power inputs.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Speed

If volatile memory is used for fast data processing, then data access speed is improved, but data retention is lost during power failures

Engineering Contradiction:
Improvedata access speedVSAvoiddata retention
Core Design Contradiction:
SpeedVSReliability

Solution Approach 1:

The memory system is segmented into two distinct parts: volatile memory (DRAM) for fast processing and non-volatile memory (NVM) for persistent storage. Each segment serves its specific function, with DRAM handling speed-critical operations and NVM ensuring data retention during power failures or catastrophic events.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The system changes the persistence parameter of memory by introducing NVM with different retention characteristics. While DRAM maintains high speed but zero retention without power, NVM provides retention without sacrificing access speed significantly, thus changing the overall system's retention parameter while maintaining performance.

Inventive Principle:
Principle #35Parameter changes

2Reliability

If data backup operations are implemented, then data integrity is improved, but system complexity increases

Engineering Contradiction:
Improvedata integrityVSAvoidsystem complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The backup functionality is merged into the memory subsystem itself by integrating NVM directly with DRAM modules. This combines storage and backup functions in a unified memory architecture, eliminating the need for separate backup systems and reducing overall complexity despite adding redundancy.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

A memory controller acts as an intermediary between the CPU and the hybrid memory architecture. It automatically manages data transfers between DRAM and NVM, handling backup operations transparently without requiring complex software intervention or manual configuration from the user.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Use of energy by moving object

If power management unit is added to the memory module, then power usage is optimized, but device complexity increases

Engineering Contradiction:
Improvepower usage efficiencyVSAvoiddevice complexity
Core Design Contradiction:
Use of energy by moving objectVSDevice complexity

Solution Approach 1:

The power management unit (PMU) is designed with multi-functionality, serving both the DRAM and NVM components simultaneously. It provides voltage regulation, power distribution, and protection functions for the entire memory module, consolidating multiple power management tasks into a single integrated component rather than requiring separate PMUs for each memory type.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentUS11561739B1Catastrophic event memory backup system
Publication Date: 2023.01.24 SMART MODULAR TECHNOLOGIES INC
  • US11561739B1 patent drawing
  • US11561739B1 patent drawing
  • US11561739B1 patent drawing

AI summary

A persistent memory unit for a computer system where the memory unit can detect a catastrophic event and automatically backup volatile memory into non-volatile memory. The memory unit can operate with a limited number of power inputs and detect the loss of power and then initiate a backup after the volatile memory of the memory unit has entered a stable self-refresh mode. The memory unit uses an on-board power management interface controller capable of redistributing power from an input power line and generating different power levels for different components on the memory unit.