Hybrid Memory System with Parallel Interface and Traffic Controller
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Solution Overview
Problem
Current memory systems fail to efficiently utilize both block-addressable and byte-addressable means within a single solution, limiting their ability to leverage the rapid speeds of volatile memory and requiring OS drivers for data transfer between volatile and non-volatile memory.
Innovation Solution
A hybrid memory system that interfaces with a host system via a Parallel Memory Interface, featuring a traffic controller to manage data traffic between volatile and non-volatile byte-addressable and block-addressable memory, allowing simultaneous read/write operations and direct data transfer between memory types without relying on the host system bus.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Use of energy by moving object
If non-volatile memory is accessed via block-addressable means, then processing power is reduced, but memory access speed remains slow
Solution Approach 1:
The patent implements a hybrid memory system that dynamically switches between block-addressable and byte-addressable access modes based on workload requirements. The system can adaptively select access methods to optimize both processing power efficiency and memory access speed for different operational scenarios.
Solution Approach 2:
The hybrid memory system provides multiple access interfaces (both block-addressable and byte-addressable) within a single memory device. This multi-functionality allows the system to serve different access patterns and performance requirements through the same physical memory infrastructure, eliminating the need to choose between speed and processing efficiency.
2Speed
If volatile memory is used for rapid access, then memory speed is improved, but data persistence is lost
Solution Approach 1:
The patent combines volatile memory (for speed) and non-volatile memory (for persistence) into a single hybrid memory device. The volatile memory components provide rapid data access while the non-volatile memory components ensure data persistence, and both are integrated to function as a unified memory system that delivers both speed and reliability simultaneously.
3Device complexity
If data is transferred between volatile and non-volatile memory via traditional system bus, then device complexity is reduced, but data transfer speed is limited
Solution Approach 1:
The patent extracts the data transfer path from the traditional system bus and implements a dedicated internal data path within the hybrid memory device. This internal path allows high-speed data transfer between volatile and non-volatile memory components without being constrained by the bandwidth and protocol limitations of the external system bus, while the controller manages this internal path efficiently.
4Ease of operation
If OS drivers are used for data transfer between memory types, then ease of operation is improved, but processing overhead increases
Solution Approach 1:
The hybrid memory device includes an integrated controller that autonomously manages data transfer operations between volatile and non-volatile memory components. This self-service capability eliminates the need for operating system drivers to mediate data transfers, reducing processing overhead and freeing up system resources while maintaining ease of operation through a unified memory interface.
Data Source
AI summary
A hybrid memory system provides rapid, persistent byte-addressable and block-addressable memory access to a host computer system by providing direct access to a both a volatile byte-addressable memory and a volatile block-addressable memory via the same parallel memory interface. The hybrid memory system also has at least a non-volatile block-addressable memory that allows the system to persist data even through a power-loss state. The hybrid memory system can copy and move data between any of the memories using local memory controllers to free up host system resources for other tasks.