Hybrid Memory Controller for Unified Volatile and Non-Volatile Access

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Solution Overview

Problem

Computing systems face challenges in efficiently accessing and managing both volatile and non-volatile memory for applications like graph neural network processing, requiring optimized memory systems that support read/write access to both types of memory and data movement between them.

Innovation Solution

A memory module with a hybrid media controller and MMIO registers provides unified memory access, including read/write access to volatile memory, bulk read/write access to non-volatile memory, and self-indexed data movement between the two, optimized for graph neural network applications.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If a unified memory system supports both volatile and non-volatile memory with multiple access patterns, then memory versatility and support for different data types improve, but device complexity increases

Engineering Contradiction:
Improvememory access versatilityVSAvoidmemory controller complexity
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The memory controller is designed as a universal device that can handle multiple memory types (volatile and non-volatile) and multiple access patterns (read, write, bulk read, bulk write, random access) through a single unified architecture. This eliminates the need for separate dedicated controllers for each memory type, thereby improving versatility while managing complexity through consolidation.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The memory controller is segmented into distinct functional units: a volatile memory controller for handling volatile memory operations and a non-volatile memory controller for handling non-volatile memory operations. Each segment handles specific access patterns independently, allowing the complex unified system to be managed through modular functional division.

Inventive Principle:
Principle #1Segmentation

2Productivity

If self-indexed data movement is implemented between memory types, then data transfer efficiency and productivity improve, but device complexity increases

Engineering Contradiction:
Improvedata transfer efficiencyVSAvoiddata movement control complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The system implements self-indexed data movement where the memory controller automatically manages data transfer between volatile and non-volatile memory without requiring explicit indexing or manual control from the host system. The controller uses internal buffers and automatic address generation to facilitate seamless data movement, improving transfer efficiency while the self-managing nature reduces the complexity burden on external control systems.

Inventive Principle:
Principle #25Self-service

Solution Approach 2:

Internal buffers are introduced as intermediaries between the volatile memory and non-volatile memory. These buffers automatically receive data from one memory type and transfer it to the other memory type, simplifying the data movement process. The buffers act as mediators that handle the complexity of data transfer internally, improving overall productivity without requiring complex external control mechanisms.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Speed

If multiple memory channels are provided for accessing both volatile and non-volatile memory, then memory bandwidth and processing performance improve, but device complexity and cost increase

Engineering Contradiction:
Improvememory bandwidthVSAvoidmemory channel architecture complexity
Core Design Contradiction:
SpeedVSDevice complexity

Solution Approach 1:

Multiple memory channels for volatile and non-volatile memory access are merged into a single unified memory controller architecture. Rather than implementing separate independent channels for each memory type, the system combines them into one integrated controller that manages all memory operations through shared resources and unified control logic, thereby achieving high memory bandwidth while reducing the complexity that would arise from completely separate channel implementations.

Inventive Principle:
Principle #5Merging (Combining)

Data Source

PatentUS12468476B2Hybrid memory management systems and methods with in-storage processing and attribute data management
Publication Date: 2025.11.11 ALIBABA GROUP HOLDING LTD
  • US12468476B2 patent drawing
  • US12468476B2 patent drawing
  • US12468476B2 patent drawing

AI summary

A memory module can include a hybrid media controller coupled to a volatile memory, a non-volatile memory, a non-volatile memory buffer and a set of memory mapped input/output (MMIO) register. The hybrid media controller can be configured for reading and writing data to a volatile memory of a memory mapped space of a memory module. The hybrid media controller can also be configured for reading and writing bulk data to a non-volatile memory of the memory mapped space. The hybrid media controller can also be configured for reading and writing data of a random-access granularity to the non-volatile memory of the memory mapped space. The hybrid media controller can also be configured for self-indexed moving data between the non-volatile memory and the volatile memory of the memory module.