Hybrid Volatile Non-Volatile Memory Device Unified Interface
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Solution Overview
Problem
Existing data processing systems face challenges due to process incompatibilities between volatile DRAM and non-volatile Flash memory, leading to delayed system readiness, slow access times, and write-limiting degradation.
Innovation Solution
A hybrid, composite memory device is developed, featuring non-volatile and volatile memories implemented in separate IC dice with a shared interface, allowing for optimized performance of each memory type and simplifying memory control and interface functions.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If DRAM and Flash memory are implemented in separate integrated circuit devices, then each memory type can be optimized independently, but system readiness is delayed due to boot-up data regeneration and reload
Solution Approach 1:
The patent combines DRAM and Flash memory into a single integrated circuit device with a unified interface, allowing the memories to work together as a hybrid storage system. This merging eliminates the need for separate control circuits and reduces boot-up time by enabling direct data access between the two memory types without regeneration and reload operations.
Solution Approach 2:
The unified interface circuitry serves multiple functions by providing a single access point for both DRAM and Flash memory operations. This multi-functional interface handles read, write, and control operations for both memory types, simplifying the system architecture and reducing the time required for system initialization.
2Ease of manufacture
If DRAM and Flash memory are implemented in separate integrated circuit devices, then manufacturing processes can be optimized independently, but device complexity increases due to distinct control and data interfaces
Solution Approach 1:
The patent merges the control and data interfaces for DRAM and Flash memory into a single unified interface circuitry within the same integrated circuit device. This consolidation reduces the number of separate interfaces needed, simplifying the overall device architecture while maintaining the ability to independently optimize manufacturing processes for each memory type.
3Reliability
If Flash memory is used for mass storage, then non-volatile data retention is achieved, but access times are slow and write operations suffer from degradation
Solution Approach 1:
The patent applies local quality by using DRAM for high-speed data access operations and Flash memory for non-volatile data retention, with each memory type optimized for its specific function. The unified interface intelligently directs read operations to DRAM for speed and ensures critical data is maintained in Flash for non-volatility, achieving both fast access and reliable data retention in different locations within the same device.
Data Source
AI summary
A method of controlling a memory device is disclosed. The method includes receiving an address value that indicates a range of addresses within the memory device, each address within the range of addresses corresponding to storage locations within each of two distinct storage dice within the memory device. The address value is stored within a programmable register within the memory device.