Hybrid Volatile Nonvolatile Memory Power Management
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
The increasing capacity of main memory in CPUs leads to higher power consumption in volatile memory technologies like DRAM, as they require continuous power supply and refresh operations, necessitating a method to reduce power consumption without compromising processing speed.
Innovation Solution
A semiconductor device with a processor and a main memory comprising both volatile and nonvolatile memory, where the operation mode of the main memory is dynamically adjusted based on access requirements and available space, switching to a power-saving mode by reducing the power supply voltage to the volatile memory when access frequency is low, and utilizing nonvolatile memory for data retention.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If the capacity of main memory is increased to improve processor performance, then processing capability is improved, but power consumption of volatile memory increases
Solution Approach 1:
The main memory is segmented into two distinct parts: volatile memory (first memory) for high-speed data access and nonvolatile memory (second memory) for data retention. This segmentation allows each memory type to operate in its optimal mode, with the volatile memory capacity optimized for speed and the nonvolatile memory providing persistent storage without requiring continuous power for data retention.
Solution Approach 2:
The system dynamically changes operational parameters by switching between a first operation mode (using volatile memory) and a second operation mode (using nonvolatile memory) based on processor access requirements. This parameter change allows the system to adapt power consumption levels to actual workload demands, reducing energy usage when high-speed access is not required.
2Speed
If volatile memory is used for high-speed data access, then processing speed is improved, but power consumption increases due to continuous power supply requirements
Solution Approach 1:
The system dynamically switches between operation modes based on real-time processor access requirements. When the processor requires high-speed data access, the system operates in the first operation mode using volatile memory. When high-speed access is not required, the system transitions to the second operation mode using nonvolatile memory, thereby dynamically adapting power consumption to actual performance needs.
Solution Approach 2:
The operational parameters of the memory system are changed by switching between different operation modes. The first operation mode configures the memory system for high-speed volatile memory access, while the second operation mode configures it for lower-power nonvolatile memory operation, allowing parameter optimization based on workload characteristics.
3Use of energy by moving object
If nonvolatile memory is used for data retention, then power consumption is reduced, but data access speed decreases
Solution Approach 1:
The memory system is segmented into volatile and nonvolatile components, each handling different types of data access patterns. The volatile memory handles time-critical, high-speed data operations, while the nonvolatile memory handles data retention and less time-sensitive operations, allowing the system to achieve low power consumption without sacrificing overall data access performance.
Solution Approach 2:
The main memory system achieves multi-functionality by combining both volatile and nonvolatile memory capabilities in a single integrated system. This universal memory system can operate in different modes to provide both high-speed access and low-power data retention, making it adaptable to various operational requirements without needing separate memory systems.
Data Source
AI summary
To reduce power consumption of a processing device including a processor and a main memory in the processor. The main memory includes not only a volatile memory such as a DRAM but also a nonvolatile memory. The processor monitors access requirements to the main memory. The processor determines on the basis of the monitoring results whether the volatile memory or the nonvolatile memory operates mainly. In the case where the main memory changes from the volatile memory to the nonvolatile memory, part or all of data stored in the volatile memory is backed up to the nonvolatile memory. While the nonvolatile memory operates mainly, supply of power supply voltage to the volatile memory is stopped or power supply voltage to be supplied is lowered.