Hybrid Memory Scheduling for Write-Intensive Workloads

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Enterprise servers face challenges with high energy consumption and latency due to the use of dynamic random access memory (DRAM) and the limitations of non-volatile memory (NVM) in storing large amounts of application data, particularly with high write latencies and wear-out issues in NVM.

Innovation Solution

Implementing a hybrid main memory system that schedules data processing functions based on a calculated write metric, executing more write-intensive functions in DRAM and less write-intensive functions in NVM, thereby mitigating the disadvantages of NVM while leveraging its advantages, such as low static energy and scalability.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Use of energy by stationary object

If non-volatile memory (NVM) is used to store large amounts of application data, then static energy consumption is reduced and data persistence is improved, but write latency increases and write operations cause wear-out

Engineering Contradiction:
Improvestatic energy consumptionVSAvoidwrite latency
Core Design Contradiction:
Use of energy by stationary objectVSLoss of time

Solution Approach 1:

The patent divides the main memory system into two distinct segments: NVM region for persistent storage and DRAM region for high-speed operations. The system selectively places data and functions in appropriate memory regions based on access patterns and write intensity, thereby resolving the contradiction between NVM's low static energy and high write latency by not using NVM for all storage operations

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Different memory regions are assigned different functional qualities: NVM region is optimized for persistent storage with low static energy consumption, while DRAM region is optimized for high-speed write operations. The scheduler assigns specific data processing functions to appropriate regions based on their write intensity characteristics, allowing each region to operate in its optimal performance mode

Inventive Principle:
Principle #3Local quality

2Reliability

If non-volatile memory (NVM) is used for data storage, then data persistence is achieved, but the usable lifespan is reduced due to write wear-out

Engineering Contradiction:
Improvedata persistenceVSAvoidusable lifespan
Core Design Contradiction:
ReliabilityVSDuration of action of stationary object

Solution Approach 1:

The memory system is segmented into NVM and DRAM regions, with the scheduler directing write-intensive functions to DRAM and read-intensive or less write-intensive functions to NVM. This segmentation protects NVM from excessive write operations that would reduce its lifespan, while still maintaining data persistence benefits where applicable

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

DRAM serves as an intermediary buffer between the processor and NVM. Write-intensive operations are handled in DRAM, which has higher write endurance, while NVM maintains data persistence for appropriate workloads. This intermediary approach extends NVM lifespan by absorbing the wear from frequent write operations

Inventive Principle:
Principle #24Intermediary (Mediator)

3Speed

If dynamic random access memory (DRAM) is used for main memory, then write speed is improved, but static energy consumption increases

Engineering Contradiction:
Improvewrite speedVSAvoidstatic energy consumption
Core Design Contradiction:
SpeedVSUse of energy by stationary object

Solution Approach 1:

The system dynamically selects between DRAM and NVM regions based on the write intensity metric of each data processing function. The scheduler continuously adapts function placement decisions based on observed access patterns, allowing the system to use DRAM's high write speed when needed while minimizing overall static energy consumption by using NVM for appropriate workloads

Inventive Principle:
Principle #15Dynamics

Data Source

PatentUS9804803B2Data access in hybrid main memory systems
Publication Date: 2017.10.31 SAP SE
  • US9804803B2 patent drawing
  • US9804803B2 patent drawing
  • US9804803B2 patent drawing

AI summary

Implementations of the present disclosure include methods, systems, and computer-readable storage mediums for identifying a data processing function to be executed in a hybrid main memory system, the hybrid main memory system including a first type of main memory and a second type of main memory, the data processing function including data access operations to access the hybrid main memory system, accessing a write metric for the data processing function, the write metric based at least in part on a proportion of the data access operations that are write operations, and, based at least in part on the write metric being less than a threshold value, designating the data processing function for execution in the first type of main memory.