Hybrid MEMS Solid-State Tuning Array for Compact RF Systems

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Solution Overview

Problem

Existing tunable electrical systems face challenges in achieving a large tuning range with fine resolution while maintaining high Q and linearity, as single-switching technology designs result in increased array size, parasitics, and reduced power handling, making large arrays of small devices impractical.

Innovation Solution

Combining multiple switching technologies, such as MEMS capacitors and solid-state-controlled elements, in a single array to provide a programmable combination of tuning elements, where MEMS capacitors handle high ratio and linearity and solid-state devices provide fine tuning, allowing for a compact and cost-effective solution.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If a single switching technology is used to achieve fine tuning resolution, then tuning resolution is improved, but array size and parasitics increase

Engineering Contradiction:
Improvetuning resolutionVSAvoidarray size
Core Design Contradiction:
Measurement precisionVSArea of stationary object

Solution Approach 1:

The patent divides the tuning function into two segments: coarse tuning handled by MEMS capacitors and fine tuning handled by solid-state switched capacitors. This segmentation allows each technology to operate in its optimal range, achieving fine resolution without requiring a large array of small devices

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent merges two different switching technologies (MEMS and solid-state) into a single hybrid array. The MEMS capacitors provide high ratio and linearity while solid-state devices provide fine tuning resolution, combining the advantages of both technologies to resolve the contradiction between tuning resolution and array size

Inventive Principle:
Principle #5Merging (Combining)

2Area of stationary object

If devices are made physically very small to reduce array size, then area is reduced, but power handling and Q factor deteriorate

Engineering Contradiction:
Improvearray sizeVSAvoidpower handling
Core Design Contradiction:
Area of stationary objectVSReliability

Solution Approach 1:

The patent applies different device sizes and technologies to different parts of the array based on functional requirements. MEMS capacitors are used for high ratio and power handling applications, while smaller solid-state devices handle fine tuning. This local differentiation allows small overall array size while maintaining high power handling capability where needed

Inventive Principle:
Principle #3Local quality

3Measurement precision

If a subset of devices is scaled down for fine tuning, then tuning resolution is improved, but process yield becomes difficult to achieve

Engineering Contradiction:
Improvetuning resolutionVSAvoidprocess yield
Core Design Contradiction:
Measurement precisionVSManufacturing precision

Solution Approach 1:

The patent segments the array into two distinct technology groups with different manufacturing processes. The solid-state switched capacitor subset uses standard semiconductor fabrication, achieving fine resolution through electrical switching rather than mechanical scaling. This avoids the process yield difficulties associated with scaling MEMS devices to very small dimensions

Inventive Principle:
Principle #1Segmentation

Data Source

PatentEP2845232B1Mixed-technology combination of programmable elements
Publication Date: 2020.03.25 WISPRY INC
  • EP2845232B1 patent drawingFigure 1~2
  • EP2845232B1 patent drawingFigure 3~4B
  • EP2845232B1 patent drawingFigure 4C

AI summary

The present subject matter relates to systems and methods for arranging and controlling programmable combinations of tuning elements in which more than one form of switching technology is combined in a single array. Specifically, such an array can include one or more first switchable elements including a first switching technology (e.g., one or more solid-state-controlled devices) and one or more second switchable elements including a second switching technology that is different than the first switching technology (e.g., one or more micro-electro-mechanical capacitors). The one or more first switchable elements and the one or more second switchable elements can be configured, however, to deliver a combined variable reactance.