Hybrid Metal Interconnect Layout for Electromigration Resistance
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Solution Overview
Problem
Conventional semiconductor interconnects using copper face challenges with increasing resistance and electromigration issues as dimensions decrease, necessitating a more reliable metal for advanced semiconductor devices.
Innovation Solution
A semiconductor structure employing two different metals for interconnects, where a low resistivity metal forms the majority of lines and vias, and a higher resistance metal is used for selected connections to mitigate electromigration and resistance issues, utilizing a hybrid metallization approach with skip vias and single-track jogs formed through subtractive etching processes.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If copper is used for interconnect lines and vias, then low electrical resistance is achieved, but electromigration reliability deteriorates at small dimensions
Solution Approach 1:
The patent applies local quality by using different metal materials in different locations of the interconnect structure. Specifically, a first metal material (e.g., copper) is used for horizontal interconnect lines where low resistance is critical, while a second metal material (e.g., cobalt or tungsten) with better electromigration resistance is used for vertical vias where electromigration is the dominant failure mechanism. This spatial differentiation of material properties resolves the contradiction by optimizing each location for its specific functional requirements.
Solution Approach 2:
The patent employs composite materials by combining multiple metal materials within the interconnect system. The hybrid metallization structure integrates copper-based materials for horizontal connections and alternative metals (such as cobalt, tungsten, or molybdenum) for vertical connections. This composite approach allows the system to simultaneously achieve low electrical resistance in lines and high electromigration resistance in vias, effectively resolving the technical contradiction between these two opposing requirements.
2Area of moving object
If dimension of interconnect lines is reduced, then device density is improved, but electrical resistance increases
Solution Approach 1:
The patent addresses this contradiction by applying local quality through selective material placement. In regions where line width must be reduced for device density, the patent uses alternative metal materials in via regions that maintain better electrical properties at scaled dimensions. The horizontal lines may use copper for low resistance, while vertical interconnects use materials like cobalt or tungsten that scale better, thus maintaining overall electrical performance while achieving higher device density.
3Reliability
If conventional damascene process is used, then manufacturing simplicity is maintained, but ability to mitigate electromigration is insufficient
Solution Approach 1:
The patent applies segmentation by dividing the interconnect metallization into distinct segments with different material compositions. The process is segmented into separate deposition and patterning steps for the first metal material (horizontal lines) and the second metal material (vertical vias). This segmentation allows each material to be optimized for its specific function while using modified but manageable process steps that extend conventional damascene techniques rather than requiring completely new complex processes.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enhances electrical reliability and performance by reducing electromigration failures and maintaining lower electrical resistance even at small line widths, offering design flexibility for semiconductor chip applications.
Implementation Method 1
selectively etching the second metal layer composed of the first metal material to form one or more lines
Implementation Method 2
depositing a second metal layer composed of the first metal material over the semiconductor structure
Data Source
AI summary
An approach to provide a semiconductor structure using different two metal materials for interconnects in the middle of the line and the back end of the line metal layers of a semiconductor chip. The semiconductor structure includes the first metal material connecting both horizontally and vertically with the second metal material and the second metal material connecting both horizontally and vertically with the first metal material where the second metal material is more resistant to electromigration than the first metal material.