Hybrid Metal Microstructure e-Fuse for Electromigration Resistance
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Solution Overview
Problem
Conventional e-Fuse structures in semiconductor devices face challenges in reducing voltage requirements as dimensions shrink, leading to high current density and electromigration issues, which affect programming efficiency and reliability.
Innovation Solution
The development of an advanced e-Fuse structure with a trench design featuring an anode, cathode, and fuse element in a dielectric material, where the fuse element has a smaller cross-section and higher aspect ratio than the anode and cathode regions, and a copper structure with different grain sizes to enhance electromigration resistance, achieved through selective deposition of an aspect ratio reducing layer and annealing.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Volume of moving object
If the dimensions of e-Fuse structures are reduced to meet shrinking semiconductor device sizes, then device integration density is improved, but voltage requirements increase and electromigration issues worsen
Solution Approach 1:
The patent applies different grain structures to different regions of the e-Fuse device: fine-grained copper in the fuse element region for low voltage operation, and coarse-grained copper in the anode and cathode regions for high electromigration resistance. This local differentiation resolves the contradiction by optimizing each region for its specific function while maintaining overall device reliability despite size reduction.
Solution Approach 2:
The e-Fuse device uses a composite copper structure with two distinct grain sizes within the same conductive path. The fine-grained and coarse-grained copper regions work together to simultaneously achieve reduced voltage requirements and improved electromigration resistance, resolving the contradiction between device miniaturization and reliability.
2Productivity
If the cross-sectional area of the fuse element is reduced to increase programming efficiency, then programming speed is improved, but current density increases causing electromigration
Solution Approach 1:
The patent creates a local quality differentiation where the fuse element has fine-grained copper structure for efficient programming, while the anode and cathode regions have coarse-grained copper structure for high electromigration resistance. This resolves the contradiction by allowing the fuse element to be narrow for fast programming while the contact regions maintain structural integrity.
Solution Approach 2:
The copper structure is segmented into distinct grain size regions: fine grains in the fuse element and coarse grains in the contacts. This segmentation allows each segment to be optimized independently - the fine-grained fuse element for programming efficiency and the coarse-grained contacts for electromigration resistance.
3Ease of manufacture
If conventional single-grain copper structure is used throughout the e-Fuse device, then manufacturing is simplified, but electromigration resistance is insufficient in contact regions
Solution Approach 1:
The patent changes the grain size parameter of the copper structure in different regions. By controlling annealing conditions and using selective masking, the fuse element region develops fine grains while contact regions develop coarse grains. This parameter differentiation improves electromigration resistance in contacts without significantly complicating the manufacturing process.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This design increases electromigration resistance differences between the cathode/anode and fuse element, improving programming efficiency and reducing hillock formation, thereby enhancing the reliability and efficiency of e-Fuse structures in semiconductor devices.
Implementation Method 1
The copper is annealed to create a large grained copper structure in the anode and cathode regions and a fine grained copper structure in the fuse element
Implementation Method 2
An aspect ratio reducing layer is selectively formed in the anode and cathode regions of the trench while leaving the fuse element region of the trench substantially free of the aspect ratio reducing layer
Data Source
AI summary
A structure and method for fabricating an e-Fuse device in a semiconductor device is described. A method for fabricating an e-Fuse device includes providing a trench structure including an anode region, a cathode region and a fuse element which interconnects the anode and cathode regions in a dielectric material on a first surface of a substrate. The fuse element has a smaller cross section and a higher aspect ratio than the anode and cathode regions. An aspect ratio reducing layer is selectively formed in the anode and cathode regions of the trench while leaving the fuse element region of the trench substantially free of the aspect ratio reducing layer. The trench is filled with copper, both over the aspect ratio reducing layer in the anode and cathode regions and in the fuse element region. The copper is annealed to create a large grained copper structure in the anode and cathode regions and a fine grained copper structure in the fuse element. Another aspect of the invention is an e-Fuse device. The e-Fuse device includes an anode region, a cathode region and a fuse element which interconnects the anode and cathode regions in a dielectric material on a first surface of a substrate. The fuse element has a smaller cross section and a higher aspect ratio than the anode and cathode regions. The anode and cathode regions are comprised of a large grained copper layer and an aspect ratio reducing layer, and the fuse element is comprised of a fine grained copper structure.