Hybrid Computing Modules With 3D Chip Stacks for Lower Server Farm Power

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Server farms consume large amounts of electrical power, straining the power grid and increasing costs, with the growing complexity of mining algorithms further exacerbating these issues.

Innovation Solution

The design and construction of server farms with high computational speeds and power efficiency, achieved by displacing printed circuit boards from microelectronic assemblies and incorporating hybrid computing modules with high-speed semiconductor chip stacks, resonant gate transistors, and efficient power management stages.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Use of energy by moving object

If conventional server farms use traditional microelectronic assemblies with printed circuit boards, then device complexity and power consumption are high, but computational speed and power efficiency are limited

Engineering Contradiction:
Improvepower consumptionVSAvoidcomputational speed
Core Design Contradiction:
Use of energy by moving objectVSProductivity

Solution Approach 1:

The patent extracts and eliminates printed circuit boards from microelectronic assemblies, directly bonding semiconductor dies to substrates. This removal of unnecessary intermediary components reduces power consumption while enabling higher computational speeds through more efficient electrical connections and reduced signal path lengths.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent transitions from two-dimensional printed circuit board layouts to three-dimensional semiconductor chip stack architectures. This dimensional change enables shorter signal paths, higher density component placement, and improved power efficiency while maintaining or enhancing computational capabilities.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Productivity

If server farms increase computational capacity to handle growing mining algorithm complexity, then productivity increases, but power consumption increases proportionally

Engineering Contradiction:
Improvecomputational capacityVSAvoidpower consumption
Core Design Contradiction:
ProductivityVSUse of energy by moving object

Solution Approach 1:

The patent changes fundamental system parameters by eliminating printed circuit boards and adopting direct semiconductor-to-substrate bonding. This parameter change reduces power consumption per unit of computational capacity, allowing server farms to increase computational capacity for complex mining algorithms without proportional increases in power consumption.

Inventive Principle:
Principle #35Parameter changes

3Use of energy by moving object

If traditional microelectronic assemblies are used, then ease of manufacture is maintained, but power efficiency and computational speed are compromised

Engineering Contradiction:
Improvepower efficiencyVSAvoidmanufacturing complexity
Core Design Contradiction:
Use of energy by moving objectVSEase of manufacture

Solution Approach 1:

The patent replaces the mechanical printed circuit board assembly system with a direct semiconductor bonding system. While this increases manufacturing complexity initially, it achieves superior power efficiency and computational speed, ultimately creating a more manufacturable system at advanced technology nodes where PCBs become obsolete.

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

Data Source

PatentUS12332717B2Server farm with at least one hybrid computing module operating at clock speed optimally matching intrinsic clock speed of a related semiconductor die related thereto
Publication Date: 2025.06.17 DE ROCHEMONT L PIERRE
  • US12332717B2 patent drawing
  • US12332717B2 patent drawing
  • US12332717B2 patent drawing

AI summary

A server farm with at least one hybrid computing module operating at clock speed optimally matching intrinsic clock speed of a related semiconductor die related thereto.