Hybrid MOSFET-GaN Switch Control for Lower Conduction Loss

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Solution Overview

Problem

Power electronics systems face challenges with high-current applications due to the high cost and reverse conduction loss of wide-bandgap devices like GaN HEMTs, which require parallel connections increasing system cost and efficiency limitations.

Innovation Solution

A hybrid switch apparatus is developed with a fast GaN HEMT and a slower Si MOSFET connected in parallel, where the fast switch is controlled to be 'on' only for a short duration and 'off' for most of the conduction period, using a pulse former to generate control drive signals that synchronize with the standard switch transitions, reducing conduction loss and allowing for a lower power rating for the fast switch.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Power

If multiple WBG devices are paralleled to increase current capability, then the current capability is improved, but the system cost increases

Engineering Contradiction:
Improvecurrent capabilityVSAvoidsystem cost
Core Design Contradiction:
PowerVSDevice complexity

Solution Approach 1:

The patent combines a WBG device and a Si device into a hybrid switch assembly where they share common source and drain terminals. This merging allows the assembly to achieve high current capability through the parallel contribution of both device types while reducing overall cost compared to using multiple WBG devices alone.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The hybrid switch assembly serves multiple functions: the WBG device provides fast switching capability while the Si device provides low reverse conduction loss and cost-effectiveness. Together, they create a universal switching solution that handles both high-frequency switching and high-current conduction requirements.

Inventive Principle:
Principle #6Universality (Multi-functionality)

2Speed

If a WBG device is used to achieve high switching frequency, then the switching frequency is improved, but the reverse conduction loss increases

Engineering Contradiction:
Improveswitching frequencyVSAvoidreverse conduction loss
Core Design Contradiction:
SpeedVSLoss of energy

Solution Approach 1:

The patent merges a WBG device optimized for fast switching with a Si device optimized for low reverse conduction loss. During reverse conduction, the Si device's body diode conducts with minimal loss, while during forward switching, the WBG device provides fast transition. This combination resolves the trade-off between switching speed and reverse conduction loss.

Inventive Principle:
Principle #5Merging (Combining)

3Power

If a higher power rating is used for the fast switch, then the current capability is improved, but the cost increases

Engineering Contradiction:
Improvecurrent capabilityVSAvoidcost
Core Design Contradiction:
PowerVSDevice complexity

Solution Approach 1:

The WBG device in the hybrid assembly is intentionally rated for lower power than what would be required if it operated alone. By sharing the current handling duty with the Si device, the WBG device can be specified at a lower, more cost-effective power rating while still achieving the required overall current capability through the combined assembly.

Inventive Principle:
Principle #16Partial or excessive action

Data Source

PatentEP3590189B1Hybrid switch control
Publication Date: 2022.01.05 HELLA GMBH & CO KGAA
  • EP3590189B1 patent drawingFigure 1~2
  • EP3590189B1 patent drawingFigure 3A~3D
  • EP3590189B1 patent drawingFigure 4~5

AI summary

A hybrid switch apparatus includes a standard semiconductor switch and a fast semiconductor switch electrically arranged in parallel to form a joint output current path for carrying a load current. The standard switch may be a silicon (Si) MOSFET while the fast switch may be a GaN high electron mobility transistor (HEMT). A means for producing first and second gate drive signals includes a pulse former. The first gate drive signal is applied the standard switch for selectively turning the standard switch on and off. The pulse former outputs the second gate drive signal for driving the fast switch, where the pulse former generates the second gate drive signal as a switch-on pulse starting synchronously with each transition of the first gate drive signal and which generates the second gate drive signal in an OFF state in between pulses to avoid incurring a conduction loss in the fast switch.