Hybrid MRAM DRAM Memory Architecture for Fast Power Cycling
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Solution Overview
Problem
Conventional mobile devices face challenges in power cycling due to slow reboot processes and significant battery consumption, especially after power disruptions, which compromise performance, security, and usability.
Innovation Solution
The implementation of a mobile device memory architecture that includes a combination of volatile and non-volatile memory, specifically using Magnetoresistive Random Access Memory (MRAM) or Spin Transfer Torque MRAM, with a memory controller and a shadow copy controller to manage data between the two memory types, allowing for faster power cycling and secure data preservation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional flash memory is used for storing system state during normal operation, then non-volatile data preservation is achieved, but read/write speed is slow and reboot process is time-consuming
Solution Approach 1:
The patent segments the memory system into two distinct parts: volatile main memory (DRAM) for high-speed data access during operation, and non-volatile memory (MRAM) for persistent data storage. This segmentation allows each memory type to operate in its optimal performance regime, with MRAM providing fast non-volatile storage and DRAM providing high-speed temporary storage, thereby resolving the contradiction between data preservation and access speed.
Solution Approach 2:
The patent merges the advantages of both volatile and non-volatile memory by implementing a hybrid memory architecture where MRAM and DRAM work together. The system combines the non-volatile data preservation capability of MRAM with the high-speed access characteristics of DRAM, creating a unified memory system that achieves both reliability and speed simultaneously.
2Reliability
If cold reboot is performed after power disruption, then system returns to normal operation, but reboot process consumes significant battery power and time
Solution Approach 1:
The patent implements preliminary action by continuously maintaining critical system state information in non-volatile MRAM memory even during normal operation. This pre-positioning of data in non-volatile memory ensures that upon power restoration, the system can immediately resume operation without requiring a full cold reboot, thereby reducing both recovery time and energy consumption while maintaining system reliability.
3Reliability
If flash memory is used for system state storage, then data persistence is achieved, but the number of write operations is limited
Solution Approach 1:
The patent employs copying by maintaining duplicate copies of critical data in both volatile DRAM and non-volatile MRAM. The shadow copy controller continuously synchronizes data between the two memory types, allowing frequent write operations to occur in the durable MRAM while preserving data persistence. This copying mechanism enables unlimited write operations to the persistent storage without compromising data integrity.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This solution enables faster power cycling and enhanced security by utilizing MRAM for quick data access and storage, reducing the need for cold reboots and protecting sensitive information from power disruptions, thus improving operational performance and security.
Implementation Method 1
The non-volatile memory may comprise a Magnetoresistive Random Access Memory (MRAM) and/or a Spin Transfer Torque MRAM (STT-MRAM)
Data Source
AI summary
A mobile device having parallel use of non-volatile memory and main memory is presented. The mobile device includes a volatile memory, a non-volatile memory, a memory controller functionally coupled to the non-volatile memory and the volatile memory, and a processor coupled to the memory controller. The processor addresses both the non-volatile memory and the volatile memory utilizing a continuous memory map. Alternatively, a mobile device may include a volatile memory, a non-volatile memory, a memory controller coupled to the volatile memory, a processor coupled to the memory controller. The processor may address the volatile memory during normal operation. The mobile device may further include a shadow copy controller coupled to the non-volatile memory and the memory controller, where the shadow copy controller copies information stored in a designated portion of the volatile memory into the non-volatile memory.