Hybrid Output Driver Data Paths for Multi-Voltage High-Speed I/O

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Solution Overview

Problem

Existing output drivers face challenges in accommodating both high-voltage and low-voltage signaling standards, leading to excessive capacitive loading that hinders high-speed signaling, as they are typically configured for specific power supply voltages, limiting their versatility and efficiency across different I/O standards.

Innovation Solution

A hybrid data path for a hybrid output driver is introduced, featuring multiplexers that dynamically switch between high-voltage and low-voltage signaling modes, utilizing thick-oxide and thin-oxide transistors to manage pull-up and pull-down signals across varying power supply voltages, allowing for tunable impedances and efficient operation in both high-voltage and low-voltage data modes.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If both high-voltage and low-voltage output drivers are multiplexed to a single output terminal, then versatility across different I/O standards is improved, but capacitive loading on the output terminal increases excessively

Engineering Contradiction:
Improvecompatibility with different I/O standardsVSAvoidcapacitive loading on output terminal
Core Design Contradiction:
Adaptability or versatilityVSObject-affected harmful factors

Solution Approach 1:

The patent divides the output driver into separate high-voltage and low-voltage data paths, each with dedicated pull-up and pull-down transistors. This segmentation prevents the capacitive loading issues of multiplexing while maintaining versatility through selective activation of appropriate voltage domains based on the required I/O standard.

Inventive Principle:
Principle #1Segmentation

2Productivity

If output drivers are configured for specific power supply voltages, then performance for a particular I/O standard is optimized, but adaptability to different I/O standards is reduced

Engineering Contradiction:
Improvesignaling speedVSAvoidcompatibility with different I/O standards
Core Design Contradiction:
ProductivityVSAdaptability or versatility

Solution Approach 1:

The patent creates a universal output driver structure that can operate in multiple voltage domains (high-voltage and low-voltage modes) through a hybrid data path architecture. The system maintains optimized signaling speed for each I/O standard by selecting the appropriate voltage domain while accommodating different power supply requirements through configurable pull-up and pull-down transistor networks.

Inventive Principle:
Principle #6Universality (Multi-functionality)

3Device complexity

If multiplexing of high-voltage and low-voltage output drivers is implemented, then device integration is improved, but high-speed signaling capability is hindered by excessive capacitive loading

Engineering Contradiction:
Improveintegration of output driversVSAvoidhigh-speed signaling capability
Core Design Contradiction:
Device complexityVSSpeed

Solution Approach 1:

The patent implements dynamic control of the output driver configuration through mode selection logic that activates either high-voltage or low-voltage data paths based on the required signaling standard. This dynamic approach maintains low capacitive loading by ensuring only the necessary voltage domain is active at any given time, preserving high-speed signaling capability while achieving integrated design.

Inventive Principle:
Principle #15Dynamics

Data Source

PatentUS10727833B1High-voltage and low-voltage data paths of a hybrid output driver
Publication Date: 2020.07.28 QUALCOMM INC
  • US10727833B1 patent drawing
  • US10727833B1 patent drawing
  • US10727833B1 patent drawing

AI summary

A hybrid output data path is provided that supports high-voltage signaling and low-voltage signaling. The high-voltage signaling is powered by a high-power supply voltage that is greater than a low-power supply voltage that powers the low-voltage signaling.