Hybrid Package Routing for Higher I/O Density and Lower Impedance
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Solution Overview
Problem
Existing semiconductor device packaging configurations struggle to accommodate sophisticated features and applications while minimizing performance impact and costs.
Innovation Solution
A semiconductor device with hybrid routing is implemented, featuring a package substrate with bond-on-trace (BOT) and bond-on-pad (BOP) pads, where inlet regions allow exposed BOT pads to be interleaved among BOP pads, enhancing pad density and routing efficiency.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If traditional packaging configurations are used, then manufacturing simplicity is maintained, but performance is limited and costs increase
Solution Approach 1:
The packaging configuration is segmented into distinct regions: a first region with bond-on-pad (BOP) pads covered by non-conductive material, and a second region with bond-on-trace (BOT) pads exposed without non-conductive material. This segmentation allows different routing styles to coexist, improving device performance while maintaining manageable manufacturing complexity through regional specialization.
Solution Approach 2:
Different regions of the package substrate are assigned different qualities: the first region uses BOP pads with non-conductive coverage for certain routing needs, while the second region uses BOT pads without non-conductive coverage for other routing needs. This local differentiation optimizes performance for specific applications without requiring complete redesign of the entire packaging system.
2Quantity of substance
If package size is increased to accommodate more connections, then I/O and power connection capacity improves, but device cost and footprint increase
Solution Approach 1:
The patent merges two different pad routing approaches (BOP and BOT) into a single hybrid configuration. This combination allows the package substrate to accommodate a higher density of I/O and power connections within the same area, increasing connection capacity without proportionally increasing package size.
Solution Approach 2:
The hybrid routing configuration utilizes both covered and uncovered regions of the package substrate, effectively using the planar dimension more efficiently. By alternating between BOP and BOT pad regions, the design maximizes the use of available substrate area for connections without requiring additional package footprint.
Data Source
AI summary
A semiconductor device having hybrid routing is provided. The semiconductor device includes a package substrate having a first major side and a second major side. A plurality of conductive bond-on-pad (BOP) pads and a plurality of conductive bond-on-trace (BOT) pads are formed at the first major side. A non-conductive layer is formed over the plurality of BOP pads. Openings in the non-conductive layer expose a central portion of each BOP pad of the plurality of BOP pads. An inlet region is formed in the non-conductive layer such that a first BOT pad of the plurality of BOT pads is located within the inlet region.