Hybrid Phase Interpolator for INL Correction in I-Q Clock Phases

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Solution Overview

Problem

Conventional phase interpolators suffer from varying degrees of Differential Non-Linearity (DNL) and Integral Non-Linearity (INL), leading to phase differences and rotational I-Q clock skews, exacerbated by digital-to-analog converter errors and nonlinear differential pairs, resulting in 'small-step/large-step' INL issues that phase blending output buffers cannot fully correct.

Innovation Solution

A hybrid phase interpolator comprising a phase interpolator mixer stage and an injection-locked ring stage, where injection signals with inverse step size profiles are generated to drive the injection-locked ring, averaging out INL errors by simultaneously applying large and small steps, thereby correcting INL and achieving constant step sizes in output clock phases.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If conventional phase interpolator architectures are used, then device complexity is reduced, but manufacturing precision deteriorates due to DNL and INL errors

Engineering Contradiction:
Improvephase interpolator linearityVSAvoidinterpolator architecture
Core Design Contradiction:
Manufacturing precisionVSDevice complexity

Solution Approach 1:

The phase interpolator is divided into multiple sub-interpolators, each handling a specific phase range with optimized step sizes. This segmentation allows each sub-interpolator to maintain higher linearity within its range, reducing overall DNL and INL errors while keeping individual sub-interpolator complexity manageable

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent dynamically adjusts step size parameters based on the current phase position. By changing the step size parameter adaptively (larger steps when far from target phase, smaller steps when close), the system achieves higher precision without requiring proportionally higher complexity throughout the entire phase range

Inventive Principle:
Principle #35Parameter changes

2Productivity

If large step sizes are used to cover full phase range, then productivity is improved, but manufacturing precision deteriorates due to INL errors

Engineering Contradiction:
Improvephase rotation speedVSAvoidphase accuracy
Core Design Contradiction:
ProductivityVSManufacturing precision

Solution Approach 1:

The step size is made dynamic rather than fixed. The system automatically adjusts step size based on the current phase position and remaining distance to target phase. This allows large steps during initial phase acquisition (maintaining productivity) while transitioning to smaller steps for fine tuning (improving precision), resolving the contradiction between speed and accuracy

Inventive Principle:
Principle #15Dynamics

3Manufacturing precision

If small step sizes are used to improve precision, then manufacturing precision is improved, but productivity deteriorates due to increased steps required

Engineering Contradiction:
Improvephase step accuracyVSAvoidphase rotation speed
Core Design Contradiction:
Manufacturing precisionVSProductivity

Solution Approach 1:

The system uses dynamic step size adjustment where large steps are employed when the phase difference is large (maintaining productivity), and small steps are used only when approaching the target phase (improving precision). This dynamic adaptation eliminates the need to use small steps throughout the entire range, thus maintaining high productivity while achieving high precision when needed

Inventive Principle:
Principle #15Dynamics

4Ease of operation

If phase blending output buffers are used, then ease of operation is improved, but manufacturing precision deteriorates due to inability to correct INL errors

Engineering Contradiction:
Improveskew mitigationVSAvoidINL correction
Core Design Contradiction:
Ease of operationVSManufacturing precision

Solution Approach 1:

The patent applies preliminary correction to the phase steps before they reach the output buffer. By pre-calculating and pre-adjusting the step sizes to compensate for expected INL errors, the system eliminates the need for the output buffer to perform complex correction operations, thus maintaining ease of operation while achieving high precision

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS10333533B1Hybrid phase interpolator to correct integral non-linearity
Publication Date: 2019.06.25 CADENCE DESIGN SYST INC
  • US10333533B1 patent drawing
  • US10333533B1 patent drawing
  • US10333533B1 patent drawing

AI summary

Aspects of the present disclosure include systems, methods, devices, and circuits for correcting integral non-linearity using a hybrid phase interpolator. Consistent with some embodiments, a circuit comprises a first and second phase interpolator mixer connected to an injection-locked ring. The first phase interpolator mixer provides a first injection signal to the injection-locked ring based on a clock signal, and the second phase interpolator mixer provides a second injection signal to the injection-locked ring. The first and second injection signals have inverse step size profiles. The injection-locked ring generates a first and second output clock phase based on the first and second injection signals. In generating the first and second output clock phases, the injection-locked ring averages the step size profiles of the first and second injection signals.