Hybrid PIC-EIC Packaging With Cooling Plate for Cryogenic Operation
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Solution Overview
Problem
Current photonic integrated circuits and electronic integrated circuits face challenges in achieving high performance and operating at cryogenic temperatures due to thermal resistance and signal attenuation issues when integrated in conventional packages.
Innovation Solution
The integration of photonic and electronic integrated circuits in a single package with face-to-face bonding and the use of cooling mechanisms, such as cooling plates, to minimize thermal resistance and match coefficients of thermal expansion, along with optical and electrical connections, enhances thermal and electrical performance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If photonic integrated circuits and electronic integrated circuits are integrated in a conventional package, then the system can be packaged, but thermal resistance increases and performance deteriorates
Solution Approach 1:
The patent merges photonic integrated circuits and electronic integrated circuits into a single hybrid package with direct face-to-face bonding, eliminating separate packaging structures. This integration reduces thermal resistance by creating direct thermal pathways between components while maintaining electrical and optical functionality, thereby improving system performance without sacrificing thermal management.
Solution Approach 2:
The patent introduces a cooling plate as an intermediary thermal management component within the hybrid package. This cooling plate serves as a thermal mediator that actively removes heat from both photonic and electronic circuits, reducing thermal resistance and enabling high-performance operation while maintaining compact integration.
2Speed
If photonic integrated circuits and electronic integrated circuits are bonded face-to-face, then interconnection paths are minimized and speed improves, but manufacturing complexity increases
Solution Approach 1:
The patent transitions from planar side-by-side arrangement to three-dimensional face-to-face bonding, stacking photonic and electronic circuits vertically. This dimensional change minimizes interconnection paths by reducing lateral distance to direct vertical coupling, thereby improving signal transmission speed while the standardized stacking process manages manufacturing complexity.
Solution Approach 2:
The patent segments the hybrid package into distinct but tightly coupled photonic and electronic circuit modules that are separately fabricated and then bonded face-to-face. This segmentation allows independent optimization of each circuit type while the bonding process integrates them, balancing manufacturing complexity with performance benefits.
3Use of energy by moving object
If cooling mechanisms are added to maintain cryogenic temperatures, then thermal conductivity improves and power efficiency increases, but device complexity increases
Solution Approach 1:
The patent merges the cooling mechanism directly into the hybrid package structure, integrating thermal management functionality with the circuit interconnection architecture. The cooling plate is bonded to both photonic and electronic circuits simultaneously, providing unified thermal management that improves power efficiency without requiring separate cooling systems for each component.
Solution Approach 2:
The cooling plate serves multiple functions: it acts as a thermal conductor to remove heat, a structural support element for mounting circuits, and a thermal anchor for maintaining cryogenic temperatures. This multi-functionality reduces overall device complexity by combining several necessary components into a single integrated element.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach reduces thermal gradient, improves thermal conductivity, and allows the circuits to operate at cryogenic temperatures, enhancing the speed and power efficiency of the device.
Implementation Method 1
a cooling plate bonded to the EIC substrate
Implementation Method 2
improves thermal conductivity, and allows the circuits to operate at cryogenic temperatures
Data Source
AI summary
Techniques disclosed herein relate generally to integrating photonic integrated circuits and electronic integrated circuits in a same package. A device includes a semiconductor substrate and a die stack on the semiconductor substrate. The die stack includes a photonic integrated circuit (PIC) die and an electronic integrated circuit (EIC) die. The PIC die includes a PIC substrate and a photonic integrated circuit formed on the PIC substrate. The EIC die includes an EIC substrate and an electronic integrated circuit formed on the EIC substrate. The EIC die and the PIC die are bonded such that the PIC substrate and the EIC substrate are disposed on opposing sides of the die stack. The PIC substrate is bonded to the semiconductor substrate. The device also includes a cooling plate bonded to the EIC substrate.