Hybrid Pin Structure for Low Insertion Loss
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Solution Overview
Problem
As data rate requirements increase, existing package pin structures like ball grid arrays (BGAs) experience high insertion loss due to feature size, routing length, and parasitic capacitance, limiting their ability to support higher data rates.
Innovation Solution
A package assembly with a hybrid pin structure that includes an insert with smaller solder balls on both sides, connected by vias, reducing parasitic capacitance and enabling higher pin densities and lower insertion loss, allowing for data transfer rates of 56 Gbps and above.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of energy
If traditional ball grid array (BGA) structures are used, then manufacturing is simpler, but insertion loss increases and data rate capability decreases
Solution Approach 1:
The package structure is segmented into multiple components: a BGA substrate, an insert component with conductive vias, and solder balls. This segmentation allows each component to be optimized independently - the insert provides low-loss signal paths while the substrate provides mechanical support, resolving the contradiction between performance and complexity.
Solution Approach 2:
An insert component is introduced as an intermediary element between the BGA substrate and the interface board. This insert contains conductive vias that create optimized signal paths, acting as a mediator that reduces insertion loss while maintaining compatibility with existing BGA manufacturing processes.
2Reliability
If feature size is increased to reduce parasitic capacitance, then data rate capability improves, but pin density decreases
Solution Approach 1:
The signal path is extended into the vertical dimension through the insert component with conductive vias. This allows smaller solder balls to be used on the surface while the via structures provide the low-parasitic capacitance paths needed for high data rates, effectively adding a third dimension to the interconnection architecture.
Solution Approach 2:
Different regions of the package serve different functions: the solder balls provide mechanical and electrical connection, while the conductive vias in the insert provide optimized signal paths with reduced parasitic capacitance. This local differentiation allows small pitch dimensions while maintaining high data rate capability through the specialized via structures.
3Quantity of substance
If routing length is increased to accommodate more pins, then pin density improves, but insertion loss increases
Solution Approach 1:
The signal path is segmented into multiple short segments through the insert component, rather than using long continuous traces on the substrate. This segmentation breaks up the routing into manageable sections with controlled impedance, reducing overall insertion loss while accommodating high pin density.
4Quantity of substance
If solder ball size is decreased to increase pin density, then pin density improves, but parasitic capacitance increases
Solution Approach 1:
The insert component with conductive vias serves as an intermediary that compensates for the increased parasitic capacitance of small solder balls. The via structures provide low-capacitance signal paths that offset the harmful effects of using numerous small solder balls, enabling high pin density without sacrificing data rate capability.
Data Source
AI summary
An apparatus for placement between a package and an integrated circuit board includes: an insert having: a substrate having a top side and a bottom side; a first set of pads at the top side of the substrate; a second set of pads at the bottom side of the substrate; and a plurality of vias in the substrate, the vias connecting respective pads in the first set to respective pads in the second set; wherein the insert has a thickness that is less than a spacing between the package and the integrated circuit board.