Hybrid PLL Switching Between Digital Frequency and Analog Phase Lock
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Solution Overview
Problem
Conventional phase lock loop (PLL) circuits face challenges in achieving fast locking times due to large gain issues with voltage-controlled oscillators in analog PLLs and quantization noise in all-digital PLLs, which affect the accuracy and efficiency of frequency and phase tracking.
Innovation Solution
A hybrid PLL that combines a digital controlled loop for frequency tracking and an analog controlled loop for phase tracking, using a hybrid oscillator controlled by a digital tuning word and an output voltage, respectively, to minimize locking time and reduce quantization noise.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If an analog PLL circuit is used, then frequency tracking capability is improved, but locking time increases due to large gain issues with voltage-controlled oscillators
Solution Approach 1:
The PLL circuit is divided into two independent loops: a digital controlled loop for frequency tracking and an analog controlled loop for phase tracking. This segmentation allows each loop to be optimized for its specific function, with the digital loop providing fast frequency acquisition and the analog loop providing accurate phase locking, thereby resolving the contradiction between fast locking time and frequency tracking accuracy.
Solution Approach 2:
The system dynamically switches between digital and analog control modes based on the locking state. During frequency acquisition, the digital loop is active with high gain for fast response. Once frequency lock is achieved, the analog loop takes over for precise phase tracking. This dynamic transition optimizes both locking time and tracking accuracy at different stages.
2Speed
If an all-digital PLL circuit is used, then locking time is reduced, but quantization noise increases affecting tracking accuracy
Solution Approach 1:
The PLL is segmented into digital frequency control and analog phase control functions. The digital loop handles frequency locking with fast response time, while the analog loop handles phase tracking with high precision and no quantization noise. This functional segmentation eliminates quantization noise in the phase tracking path while maintaining fast locking capability.
Solution Approach 2:
A hybrid oscillator serves as an intermediary element that can be controlled by both digital and analog inputs. It receives digital tuning words for frequency control and analog control voltages for phase control, seamlessly bridging the digital and analog domains to achieve both fast locking and high precision phase tracking without quantization noise.
3Speed
If a hybrid PLL structure is used, then locking time and quantization noise are improved, but device complexity increases
Solution Approach 1:
The hybrid oscillator is designed as a universal component that accepts both digital tuning words and analog control voltages, performing both frequency and phase control functions. This multi-functionality allows a single oscillator core to serve dual purposes, reducing the need for separate oscillators and simplifying the overall circuit structure despite the hybrid architecture.
Solution Approach 2:
The digital controlled loop and analog controlled loop are merged into a unified hybrid PLL system with a common feedback path and shared oscillator. The merging of control paths and resources reduces redundant components and interconnections, minimizing the increase in device complexity while achieving the benefits of both digital and analog approaches.
Data Source
AI summary
Hybrid phase lock loop (PLL) devices are provided that combine advantages of the digital controlled loop and the analog controlled loop. For example, a hybrid PLL includes a digital controlled loop that receives a reference input signal and an output signal of the hybrid PLL, and generates a digital tuning word. The hybrid PLL further includes an analog controlled loop that receives the reference input signal and the output signal of the hybrid PLL, and generates an output voltage. The hybrid PLL also includes a hybrid oscillator. An oscillator controller of the digital controlled loop controls the hybrid oscillator using the digital tuning word and disables the analog controlled loop during a frequency tracking operation mode of the hybrid PLL. The oscillator controller enables the analog controlled loop to control the hybrid oscillator during the phase tracking operation mode of the hybrid PLL.