Hybrid PLL Switching Between Fast Locking and Precise Phase Tracking
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Solution Overview
Problem
Conventional phase lock loop (PLL) circuits face challenges in achieving fast locking times due to large voltage-controlled oscillator gains and quantization noise, particularly in analog PLLs and all-digital PLLs, which affect the accuracy and efficiency of frequency and phase tracking.
Innovation Solution
A hybrid PLL that combines a digital controlled loop for frequency tracking and an analog controlled loop for phase tracking, using a hybrid oscillator controlled by a digital tuning word and an output voltage, respectively, to minimize quantization noise and reduce oscillator gain, thereby enhancing locking time and stability.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If an analog PLL circuit is used, then phase tracking accuracy is improved, but locking time increases and quantization noise is generated
Solution Approach 1:
The PLL circuit is segmented into two functional parts: a digital controlled loop for frequency tracking and an analog controlled loop for phase tracking. This segmentation allows each loop to optimize for its specific function, with the digital loop providing fast frequency acquisition and the analog loop providing accurate phase tracking, thereby resolving the contradiction between locking time and phase tracking accuracy.
Solution Approach 2:
The system dynamically switches between digital and analog control modes based on the locking state. During frequency acquisition, the digital controlled loop is active for fast response. Once frequency lock is achieved, the analog controlled loop takes over for precise phase tracking. This dynamic transition optimizes both locking time and phase tracking accuracy at different stages.
2Loss of time
If an all-digital PLL circuit is used, then locking time is reduced, but quantization noise increases and phase tracking accuracy deteriorates
Solution Approach 1:
The PLL is divided into digital and analog sections, with the digital controlled loop handling frequency tracking to achieve fast locking, and the analog controlled loop handling phase tracking to maintain high accuracy. This segmentation allows the system to benefit from both digital speed and analog precision without suffering from quantization noise in the phase tracking path.
Solution Approach 2:
The hybrid oscillator serves as an intermediary between the digital and analog controlled loops. It accepts control signals from both loops and generates the output clock signal. This intermediary structure allows seamless integration of digital frequency control and analog phase control, enabling fast locking without sacrificing phase tracking accuracy.
3Measurement precision
If analog components are used in PLL, then phase tracking capability is improved, but device area and power consumption increase
Solution Approach 1:
The analog components are segmented and activated only when needed for phase tracking. The digital controlled loop handles frequency tracking without requiring analog components, reducing the overall analog circuit area. The analog controlled loop uses minimal analog components specifically for phase tracking functions, optimizing the area-efficiency tradeoff while maintaining phase tracking capability.
Data Source
AI summary
Hybrid phase lock loop (PLL) devices are provided that combine advantages of the digital controlled loop and the analog controlled loop. For example, a hybrid PLL includes a digital controlled loop that receives a reference input signal and an output signal of the hybrid PLL, and generates a digital tuning word. The hybrid PLL further includes an analog controlled loop that receives the reference input signal and the output signal of the hybrid PLL, and generates an output voltage. The hybrid PLL also includes a hybrid oscillator. An oscillator controller of the digital controlled loop controls the hybrid oscillator using the digital tuning word and disables the analog controlled loop during a frequency tracking operational mode of the hybrid PLL. The oscillator controller enables the analog controlled loop to control the hybrid oscillator during the phase tracking operational mode of the hybrid PLL.