Hybrid Pocket Post Interconnect for CTE-Strain Relief in 3D Stacks
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Solution Overview
Problem
Conventional 3D-integrated electrical devices face structural damage and electrical interruptions due to tensile strain caused by mismatches in coefficients of thermal expansion (CTE) between different materials, particularly at low operating temperatures, which can damage fragile materials like mercury cadmium telluride (MCT) used in infrared detectors.
Innovation Solution
The design incorporates a tailored via dielectric and hybrid pocket post interconnect structure where the CTE of the dielectric insulating layers is equal to or greater than that of the interconnect structure, and a hybrid interconnect with a low-CTE conductor post containing a high-CTE conductor contact, minimizing tensile strain on fragile materials by applying compressive forces and relieving strain through void expansion and elongation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional direct bond or hybrid bond process is used to vertically stack ICs, then 3D-integrated electrical device structure is achieved, but tensile strain is generated due to CTE mismatches causing structural damage and electrical interruption
Solution Approach 1:
The patent modifies the CTE parameter of the dielectric insulating layer by selecting materials and adjusting composition to achieve a CTE that matches or exceeds that of the interconnect structure. This parameter change eliminates the CTE mismatch that causes tensile strain during thermal cycling, thereby preventing structural damage and electrical interruption while maintaining reliable electrical connections in 3D-integrated devices
Solution Approach 2:
The patent employs composite material structures including hybrid interconnect structures combining copper and other materials, and multi-layer dielectric systems with tailored CTE properties. These composite structures enable precise control of thermal expansion characteristics to match fragile semiconductor materials like MCT, preventing tensile strain accumulation while maintaining electrical functionality across temperature ranges
2Adaptability or versatility
If fragile materials like MCT are incorporated into device structures, then infrared detection function is achieved, but CTE-induced tensile forces cause damage and interrupt proper operation
Solution Approach 1:
The patent changes the CTE parameter of surrounding dielectric and interconnect materials to match or exceed that of fragile MCT materials. This parameter matching prevents CTE-induced tensile forces from exceeding MCT's low fracture toughness during thermal expansion and contraction, enabling infrared detection functionality while preventing material damage
Solution Approach 2:
The patent introduces dielectric insulating layers with tailored CTE properties as intermediary materials between the interconnect structure and fragile MCT materials. These intermediary layers act as thermal expansion buffers that absorb differential expansion stresses, protecting the MCT material from tensile damage while maintaining electrical connection integrity
3Reliability
If conventional metal interconnect post is used, then electrical connection is achieved, but high tensile stress is imparted on contact pads and MCT layer at low temperatures
Solution Approach 1:
The patent changes the CTE parameter of the interconnect structure by using hybrid materials (e.g., copper combined with other materials) or materials with CTE equal to or greater than the dielectric layer. This parameter change ensures that at low operating temperatures, the interconnect does not contract more than the surrounding dielectric, thereby eliminating high tensile stress on contact pads and MCT layer while maintaining reliable electrical contact
Solution Approach 2:
The patent converts the typically harmful effect of thermal expansion differences into a beneficial design feature by deliberately selecting materials where the dielectric CTE is greater than or equal to the interconnect CTE. This creates a design where thermal cycling produces compressive or neutral stress states rather than tensile stress, protecting fragile materials while maintaining electrical functionality
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach ensures reliable electrical contact between read out integrated circuits (ROIC) and MCT-based detectors without causing tensile strain, maintaining device performance across a wide temperature range, from fabrication to operation, by neutralizing or reducing axial tensile forces on the MCT material.
Implementation Method 1
the CTE of the dielectric insulating layers is equal to or greater than that of the interconnect structure extending through the dielectric insulating layers
Implementation Method 2
a hybrid interconnect with a low-CTE conductor post containing a high-CTE conductor contact, minimizing tensile strain on fragile materials by applying compressive forces and relieving strain through void expansion and elongation
Data Source
AI summary
An electrical device includes a substrate, an insulating layer supported by the substrate, and an electrically conductive vertical interconnect disposed in a via hole of the insulating layer. The insulating layer may be configured to provide a coefficient of thermal expansion (CTE) that is equal to or greater than a CTE of the vertical interconnect to thereby impart axial compressive forces at opposite ends of the interconnect. The vertical interconnect may be a hybrid interconnect structure including a low CTE conductor post having a pocket that contains a high CTE conductor contact. At low operating temperatures, the high CTE conductor contact is under tension due to the higher CTE, and thus the high CTE conductor contact relieves strain in the device by void expansion and elongation.