Hybrid Time-Frequency Preconditioner for PLL Simulation
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Solution Overview
Problem
Simulating phase locked loops (PLLs) in integrated circuits is challenging due to the complexity of digital sub-blocks, particularly phase detectors, frequency dividers, and voltage controlled oscillators, which result in slow convergence or divergence during harmonic balance method simulations.
Innovation Solution
A hybrid time and frequency domain preconditioner is used to rapidly solve non-linear equations by selectively switching between time and frequency domain preconditioning techniques, avoiding divergence and stalling issues.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If digital sub-blocks (phase detectors, frequency dividers, voltage controlled oscillators) are simulated using harmonic balance method, then simulation accuracy is improved, but convergence speed deteriorates and simulation time increases
Solution Approach 1:
The PLL circuit is divided into multiple digital sub-blocks (phase detector, frequency divider, voltage controlled oscillator) that can be simulated independently. Each sub-block is extracted and simulated separately using the harmonic balance method, allowing parallel processing and reducing overall simulation time while maintaining accuracy.
Solution Approach 2:
The patent pre-processes the digital sub-blocks by extracting their transfer functions and characteristics before main simulation. This preliminary action includes computing phase noise contributions of each sub-block separately, which speeds up the overall simulation by avoiding repeated complex calculations during iterative convergence.
2Reliability
If complex digital sub-blocks are simulated directly, then simulation completeness is improved, but convergence stability deteriorates causing divergence
Solution Approach 1:
The complex PLL system is segmented into manageable digital sub-blocks that are simulated independently. This segmentation reduces the complexity of the system of non-linear equations for each sub-block, improving convergence stability while maintaining overall simulation completeness through combination of sub-block results.
Solution Approach 2:
The patent introduces an intermediary approach by using transfer functions and phase noise models as intermediate representations of digital sub-blocks. These intermediaries simplify the non-linear equations and improve convergence stability while preserving the essential behavior of the original complex digital circuits.
3Measurement precision
If phase noise simulation is performed for each sub-block, then timing jitter accuracy is improved, but computational complexity increases
Solution Approach 1:
The computational task is segmented into independent phase noise simulations for each digital sub-block. This allows the use of efficient algorithms for each sub-block separately and enables parallel computation, reducing overall computational complexity while maintaining high timing jitter accuracy through combination of sub-block results.
Solution Approach 2:
The patent transforms the complex time-domain simulation problem into frequency-domain parameter analysis by computing phase noise spectral densities. This parameter transformation simplifies the computational complexity by using frequency-domain methods that are more efficient for noise analysis while preserving timing jitter accuracy through proper spectral integration.
Data Source
AI summary
A system for a fast method to simulate phase lock loop (PLL) sub-block simulation is presented. The simulation of the sub-blocks of the PLL involve solving a system of non-linear equations for the voltages and currents in the sub-blocks of the PLL. A harmonic balance method is used to solve the system of non-linear equation. The harmonic balance method involves creating a system of linear equations which is solved using a novel hybrid time and frequency domain preconditioner. The hybrid time and frequency domain preconditioner includes the strong and fast convergence property of time-domain preconditioning while avoiding the potential divergent problems of time-domain preconditioning. In addition the hybrid time and frequency domain preconditioner also includes the dependable convergence of frequency domain preconditioning while avoiding the potential stalling problems of frequency domain preconditioning.