Hybrid Processor Architecture for Space Radiation Hardening
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Solution Overview
Problem
Mission application systems using commercially off-the-shelf components fail in hostile environments due to radiation exposure, and radiation-hardened processors are expensive and underperforming, particularly in space missions where processing speed is critical.
Innovation Solution
An environmentally hardened architecture is implemented, featuring a hybrid processor with both environmentally hardened and sensitive sections, a high-speed bus with corresponding interfaces, and an event detector that switches operations to the hardened sections during environmental events, ensuring critical applications are processed without sacrificing performance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If radiation hardened processors are used, then reliability is improved, but productivity deteriorates
Solution Approach 1:
The system divides the processor into two distinct sections: a radiation-hardened processing section and an environmentally-sensitive processing section. The hardened section handles critical applications requiring reliability, while the sensitive section handles non-critical applications requiring high performance. This segmentation allows each section to be optimized for its specific purpose without compromise.
Solution Approach 2:
Different parts of the processing system have different quality characteristics. The critical application processing section uses radiation-hardened components with high reliability but lower performance, while the non-critical application processing section uses high-performance COTS components that are sensitive to radiation. Each local section has the quality appropriate for its function.
2Object-affected harmful factors
If radiation hardened processors are used, then object-affected harmful factors are reduced, but device complexity increases
Solution Approach 1:
The system segments the processing workload and hardware into hardened and sensitive portions, managing complexity through clear separation of concerns. The event detector, hardened processor section, and bus switching mechanism work together to automatically manage which section handles which applications, reducing the operational complexity despite the increased hardware complexity.
Solution Approach 2:
An event detector serves as an intermediary that monitors environmental conditions and triggers switching between hardened and sensitive processing sections. The bus switching mechanism acts as an intermediary to route data traffic appropriately. These intermediaries simplify the control logic by automating the decision-making process.
3Device complexity
If COTS components are used, then device complexity is reduced, but object-affected harmful factors increase
Solution Approach 1:
The system applies local quality by protecting only the specific sections that require radiation hardness rather than hardening the entire system. Critical application processing occurs in the hardened section, while non-critical processing uses vulnerable but simpler COTS components in the sensitive section, optimizing the balance between protection and complexity.
Solution Approach 2:
Instead of applying radiation hardening to the entire processing system (excessive action), the invention applies hardening only to the extent necessary for critical applications (partial action). This partial hardening approach reduces the overall complexity and cost while still providing adequate protection for mission-critical functions.
Data Source
AI summary
An environmentally hardened architecture comprises a hybrid processor, a high speed bus having environmentally-sensitive interfaces, an environmentally hardened bus having environmentally-hardened interfaces, and an environmentally-hardened processor communicatively coupled to an environmentally-sensitive interface of the high speed bus and communicatively coupled to an environmentally-hardened interface of the environmentally hardened bus. The hybrid processor includes an environmentally-hardened processing section and an environmentally-sensitive processing section. At least one environmentally-sensitive interface is configured to pass data to and from the environmentally-sensitive processing section and another environmentally-sensitive interface is configured to pass data to and from the environmentally-hardened processing section of the hybrid processor. An environmentally-hardened interface is configured to pass data to and from the environmentally-hardened processing section of the hybrid processor. The environmentally-hardened processor processes critical applications in the environmentally-hardened processing section of the at least one hybrid processor during an environmental event.