Hybrid Processor Architecture for Thermal Density Reduction

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Solution Overview

Problem

High Performance Computers face limitations in scalability due to power dissipation and on-chip communication issues, particularly in SIMD architectures where synchronization requirements lead to thermal density and hotspot formation, restricting the use of coarse computing elements.

Innovation Solution

A hybrid computer architecture integrating a sequential processor with a single instruction massively parallel (SIMD) processor and a shared memory module, where the SIMD processor is directly coupled to the shared memory, allowing concurrent access and eliminating the need for data synchronization between processors.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If SIMD processor uses coarse computing elements with synchronization requirements, then parallel processing capability is improved, but thermal density and hotspot formation increase

Engineering Contradiction:
Improveparallel processing capabilityVSAvoidthermal density
Core Design Contradiction:
ProductivityVSTemperature

Solution Approach 1:

The system divides the processing architecture into two distinct segments: a sequential processor for control and coordination tasks, and a SIMD processor for parallel data processing. This segmentation allows each processor type to operate independently with its own optimal characteristics, preventing thermal concentration in a single processing unit while maintaining high parallel processing capability through the SIMD segment.

Inventive Principle:
Principle #1Segmentation

2Speed

If SIMD processor is directly coupled to shared memory, then data access speed is improved, but synchronization overhead increases

Engineering Contradiction:
Improvedata access speedVSAvoidsynchronization overhead
Core Design Contradiction:
SpeedVSLoss of time

Solution Approach 1:

The synchronization function is extracted from the SIMD processor and assigned to the sequential processor. The sequential processor handles all coordination and synchronization tasks with shared memory, while the SIMD processor focuses exclusively on parallel data processing. This extraction eliminates synchronization overhead from the parallel processing path, maintaining high data access speed without the penalty of synchronization delays.

Inventive Principle:
Principle #2Taking out (Extraction)

3Productivity

If hybrid processor architecture is implemented, then computation-to-bandwidth ratio is improved, but device complexity increases

Engineering Contradiction:
Improvecomputation-to-bandwidth ratioVSAvoidprocessor architecture complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The system merges a sequential processor and a SIMD processor into a unified hybrid architecture that shares common resources including memory and interconnect structures. This merging allows the system to achieve high computation-to-bandwidth ratio by combining the sequential processor's coordination efficiency with the SIMD processor's parallel processing power, while sharing infrastructure components reduces the overall complexity increase that would result from completely separate systems.

Inventive Principle:
Principle #5Merging (Combining)

Data Source

PatentUS10996959B2Hybrid processor
Publication Date: 2021.05.04 TECHNION RES & DEV FOUND LTD
  • US10996959B2 patent drawing
  • US10996959B2 patent drawing
  • US10996959B2 patent drawing

AI summary

A hybrid computer that comprises a sequential processor, a single instruction massively parallel (SIMD) processor, and shared memory module that is shared between the sequential processor and the SIMD processor.