Hybrid Hardware-Software Rate Control for HEVC

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Solution Overview

Problem

High Efficiency Video Coding (HEVC) faces challenges in rate control, particularly in managing bit counts within constraints to avoid exceeding decoder limitations, especially in real-time applications with changing video conditions, where rapid adjustments to encoding parameters are needed to maintain accurate bit rate and transmission behavior.

Innovation Solution

A hardware encoder with a block analyzer and a software stream analyzer work together to dynamically alter encoding parameters of coding units or tree units, allowing for rapid adjustments in response to encoder conditions and video stream evaluations, using a combination of hardware and software resources to manage bit rates effectively.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If complex rate control analyses are performed to ensure accurate bit rate control, then manufacturing precision is improved, but processing time increases making real-time operation difficult

Engineering Contradiction:

Improvebit rate control accuracyVSAvoidprocessing delay

Core Design Contradiction:

Manufacturing precisionVSLoss of time

Solution Approach 1:

The rate control analysis is divided into two separate modules: a block analyzer that performs rapid hardware-based analysis of individual coding units to detect potential bit rate violations, and a stream analyzer that performs comprehensive software-based analysis of the entire video stream. This segmentation allows the system to combine fast local responses with thorough global analysis, achieving both real-time responsiveness and accurate bit rate control.

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

The block analyzer performs preliminary analysis of coding units during the encoding process to predict potential bit rate violations before they occur. By detecting complex cases early and adjusting encoding parameters proactively, the system prevents bit rate constraints from being exceeded, eliminating the need for lengthy post-processing analysis and enabling real-time operation.

Inventive Principle:

Principle #10Preliminary action

2Speed

If hardware resources are used for rapid parameter adjustment, then processing speed is improved, but device complexity increases

Engineering Contradiction:

Improveparameter adjustment speedVSAvoidencoder complexity

Core Design Contradiction:

SpeedVSDevice complexity

Solution Approach 1:

The system merges hardware and software resources by combining a hardware-based block analyzer for rapid real-time parameter adjustment with a software-based stream analyzer for comprehensive analysis. This hybrid approach leverages the speed of hardware for immediate responses while using software for thorough evaluation, achieving both fast parameter adjustment and controlled device complexity through resource complementarity.

Inventive Principle:

Principle #5Merging (Combining)

Data Source

PatentUS11076157B1Apparatus and method for rate control in accordance with block and stream analyses

Publication Date: 2021.07.27 XILINX INC

AI summary

A hardware encoder has a block analyzer configured in hardware to selectively alter encoding parameters of a coding unit or a coding tree unit in response to encoder conditions and an analysis of the coding unit or coding tree unit. A stream analyzer operating as a software process on one or more computational cores selectively alters encoding parameters in response to evaluation of parameters associated with a stream of video data.