Hybrid Ring PLL with Dual-Path Tuning for Low Phase Jitter
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Solution Overview
Problem
Purely digital PLLs suffer from high phase jitter due to quantized phase error correction, while purely analog PLLs have complex correction paths and large footprints, and hybrid LC tank PLLs are costly and large, making them unsuitable for all applications.
Innovation Solution
A hybrid ring PLL circuit with both digital and analog paths that simultaneously control the frequency of a ring oscillator, using a digital path for discrete frequency adjustments and an analog path for continuous adjustments, reducing phase jitter while maintaining a smaller footprint.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If a purely digital PLL is used, then the device complexity and footprint are reduced, but the phase jitter increases due to quantized phase error correction
Solution Approach 1:
The patent combines digital and analog correction paths in a hybrid PLL architecture. The digital path provides coarse frequency adjustment with low complexity, while the analog path provides fine frequency adjustment with continuous control. This merging allows the system to achieve low phase jitter through analog correction while maintaining the simplicity and small footprint of digital circuitry for the majority of the correction range.
Solution Approach 2:
The correction function is segmented into two distinct paths: a digital path for coarse correction and an analog path for fine correction. This segmentation allows each path to be optimized for its specific function, with the digital path handling large frequency deviations and the analog path handling small frequency deviations, thereby reducing overall phase jitter while maintaining device simplicity.
2Reliability
If a purely analog PLL is used, then the phase jitter is reduced through continuous correction, but the device complexity and footprint increase due to complex correction paths
Solution Approach 1:
Instead of using a fully analog correction path for the entire frequency range, the patent applies analog action only partially - for fine frequency adjustments when the phase error is small. For larger frequency deviations, the digital path handles the correction. This partial use of analog circuitry reduces phase jitter when needed while avoiding the complexity of a complete analog correction system.
3Reliability
If a hybrid LC tank PLL is used, then the phase jitter is reduced, but the device footprint and cost increase
Solution Approach 1:
The patent replaces the traditional LC tank resonator (a mechanical/electrical resonant system requiring large inductors and capacitors) with a ring oscillator-based system. The ring oscillator uses only resistors and capacitors, eliminating the need for large-area inductors. This substitution maintains the ability to achieve low phase jitter through analog correction while dramatically reducing the device footprint and avoiding the high cost associated with LC tank components.
Data Source
AI summary
A phase locked loop circuit is disclosed. The phase locked loop circuit includes a ring oscillator. The phase locked loop circuit also includes a digital path including a digital phase detector. The phase locked loop circuit further includes an analog path including a linear phase detector. Additionally, the phase locked loop circuit includes a feedback path connecting an output of the ring oscillator to an input of the digital path and an input of the analog path. The digital path and the analog path are parallel paths. The digital path provides a digital tuning signal the ring oscillator that digitally controls a frequency of the ring oscillator. The analog path provides an analog tuning signal the ring oscillator that continuously controls the frequency of the ring oscillator.