Hybrid SLC MLC Memory System Data Routing
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Solution Overview
Problem
Non-volatile memory systems face challenges in efficiently determining whether to store data in single-level or multi-level memory cells, affecting performance and data storage capacity.
Innovation Solution
A non-volatile memory system that includes a non-volatile memory cell array with both multi-level and single-level cells, an interface unit analyzing data characteristics, and a flash transition layer that determines storage based on these characteristics, using a hybrid algorithm or data block history storage to decide between SLC and MLC areas.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If multi-level memory cells are used to increase data storage capacity, then storage capacity per unit chip area is improved, but performance and endurance deteriorate
Solution Approach 1:
The memory system is segmented into distinct regions: an SLC area containing single-level cells for high-performance storage and an MLC area containing multi-level cells for high-capacity storage. This spatial segmentation allows each cell type to serve its optimal purpose without compromising the other, resolving the contradiction between capacity and performance.
Solution Approach 2:
Different areas of the memory device are assigned different qualities: the SLC area provides high performance and endurance for critical data, while the MLC area provides high capacity for bulk storage. This local differentiation of quality allows the system to simultaneously achieve both performance and capacity goals.
2Reliability
If single-level memory cells are used to ensure high performance and endurance, then reliability is improved, but data storage capacity deteriorates
Solution Approach 1:
The memory system divides storage space into SLC and MLC regions, allowing single-level cells to serve performance-critical applications while multi-level cells handle capacity requirements. This segmentation prevents the system from being constrained by the limitations of either cell type alone.
Solution Approach 2:
The memory system achieves multi-functionality by combining SLC and MLC areas, enabling it to simultaneously provide high performance, high capacity, and flexible data placement options. The flash transition layer adds another dimension of functionality by automatically managing data distribution between cell types.
3Adaptability or versatility
If a memory system includes both single-level and multi-level memory cells to increase operating flexibility, then adaptability is improved, but device complexity increases
Solution Approach 1:
A flash transition layer is introduced as an intermediary component between the data storage layers and the control logic. This transition layer automatically manages the complexity of data distribution between SLC and MLC areas, translating high-level storage decisions into low-level cell-level operations without exposing the complexity to the user.
Solution Approach 2:
The flash transition layer implements self-service by automatically analyzing data characteristics and making intelligent decisions about where to store data without requiring manual intervention. The system monitors write data characteristics and autonomously routes data to appropriate cell types, reducing operational complexity.
Data Source
AI summary
Provided is a system storing data received from an application or file system in a non-volatile memory system of single-level cells and multi-level cells in accordance with one or more data characteristics. The non-volatile memory system includes a non-volatile memory cell array having a plurality of multi-level cells forming a MLC area and a plurality of single-level cells forming a SLC area, and an interface unit analyzing a characteristic of the write data and generating a corresponding data characteristic signal. A flash transition layer receives the data characteristic signal, and determines whether the write data should be stored in the MLC area or the SLC area based on whether or not the write data will be accessed by the file, or whether the address associated with the write data is frequently updated or not.