Hybrid SSD Controller Host Memory Caching FTL Tables
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Solution Overview
Problem
Conventional SSDs require a substantial amount of random access memory (RAM) for memory controller operations such as storing and buffering large flash translation layer (FTL) tables, which can be inefficient in terms of resource usage and access speed.
Innovation Solution
Implementing a hybrid mode in SSDs that leverages host memory to cache FTL tables and index tables, allowing the controller to load and search these tables efficiently, reducing the need for extensive RAM usage by partitioning NVM storage and using both NVMe and NVM++ protocols for address mapping.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If conventional SSD uses substantial amount of RAM for storing FTL tables and buffering data, then access operation can be performed, but resource usage efficiency deteriorates and access speed is reduced
Solution Approach 1:
The patent transitions from a single-memory architecture to a hybrid memory architecture by adding a new dimension - utilizing host system RAM as an extension of SSD memory resources. This allows FTL tables to be stored in host RAM rather than consuming SSD controller RAM, effectively resolving the contradiction between reducing RAM usage and maintaining access speed through multi-dimensional memory utilization.
Solution Approach 2:
The patent introduces a memory management unit (MMU) and translation layer as intermediaries between the host system and SSD controller. These intermediaries manage the FTL tables stored in host RAM, enabling the SSD to access translation information without requiring dedicated RAM on the controller, thus resolving the resource efficiency contradiction.
2Adaptability or versatility
If FTL table size increases with NVM storage capacity, then mapping capability is improved, but memory resource consumption increases
Solution Approach 1:
The patent extracts the FTL table storage function from the SSD controller memory and relocates it to the host system memory. This extraction allows the SSD to maintain mapping capability for large NVM capacities while the actual table storage burden is taken out and handled by the host system's abundant memory resources.
Solution Approach 2:
The host system RAM, which serves multiple purposes in the system, is utilized for storing FTL tables. This multi-functional use of host memory allows the SSD to gain enhanced mapping capability without dedicating specialized memory resources, as the same host RAM serves both system operations and SSD translation functions.
3Productivity
If hybrid mode is implemented to reduce RAM usage, then resource efficiency is improved, but system complexity increases
Solution Approach 1:
The patent introduces a memory management unit (MMU) and translation layer as intermediaries between the host system and SSD controller. These intermediaries manage the FTL tables stored in host RAM, enabling the SSD to access translation information without requiring dedicated RAM on the controller, thus resolving the resource efficiency contradiction.
Data Source
AI summary
A system configuration containing a host, solid state drive (“SSD”), and controller able to perform a hybrid mode non-volatile memory (“NVM”) access is disclosed. Upon receiving a command with a logical block address (“LBA”) for accessing information stored in NVM, a secondary flash translation layer (“FTL”) index table is loaded to a first cache and entries in a third cache is searched to determine validity associated with stored FTL table. When the entries in the third cache are invalid, the FTL index table in the second cache is searched to identify valid FTL table entries. If the second cache contains invalid FTL index table, a new FTL index table is loaded from NVM to the second cache. The process subsequently loads at least a portion of FTL table indexed by the FTL index table in the third cache.


