Hybrid Substrate Assembly With Cavity-Mounted Die for Millimeter-Wave RF

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Solution Overview

Problem

Current semiconductor package technologies face challenges with substrate and passive component losses, decreased active device performance, and manufacturing variations in wirebond interconnects at higher frequencies, particularly in millimeter wave systems, which impact RF performance and are costly.

Innovation Solution

The development of hybrid semiconductor device assemblies that incorporate a functional substrate with cavities for semiconductor die placement, along with a build-up structure of electrically conductive patterned material and controlled interconnects to enhance high-frequency performance and thermal dissipation.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If traditional wirebond interconnects are used at millimeter wave frequencies, then manufacturing is simpler, but manufacturing variations (wirebond loop heights and length variations) adversely impact RF performance

Engineering Contradiction:
ImproveRF performance consistencyVSAvoidinterconnect structure complexity
Core Design Contradiction:
Manufacturing precisionVSDevice complexity

Solution Approach 1:

The patent replaces traditional mechanical wirebond interconnects with a printed circuit board (PCB) trace-based interconnect system. The PCB traces are formed through standard PCB fabrication processes (copper deposition, etching, lamination), eliminating the mechanical wirebonding step. This substitution provides controlled impedance traces with consistent dimensions, eliminating the loop height and length variations inherent in wirebonding, while maintaining manufacturing simplicity through standardized PCB processes.

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

2Speed

If higher frequency operation (millimeter wave) is implemented, then system performance improves, but substrate and passive component losses increase

Engineering Contradiction:
Improveoperating frequencyVSAvoidsubstrate and passive component losses
Core Design Contradiction:
SpeedVSLoss of energy

Solution Approach 1:

The patent addresses high-frequency losses by carefully selecting and specifying substrate parameters (dielectric constant, loss tangent, thickness) and passive component characteristics optimized for millimeter wave operation. The PCB substrate is chosen with low loss properties, and trace geometries are designed with controlled impedance to minimize transmission losses at millimeter wave frequencies, enabling high-frequency operation while managing energy losses.

Inventive Principle:
Principle #35Parameter changes

3Volume of moving object

If device integration is increased to reduce size, then platform size decreases, but thermal dissipation becomes more challenging

Engineering Contradiction:
Improveplatform sizeVSAvoidthermal dissipation
Core Design Contradiction:
Volume of moving objectVSTemperature

Solution Approach 1:

The patent introduces a thermally conductive underfill material as an intermediary between the semiconductor device and the PCB substrate. This underfill material serves as a thermal pathway, conducting heat away from the integrated devices through the PCB structure. The underfill has higher thermal conductivity than the surrounding materials, creating efficient thermal channels that enable heat dissipation in the compact integrated platform without requiring larger physical dimensions.

Inventive Principle:
Principle #24Intermediary (Mediator)

Data Source

PatentUS11830842B2Hybrid device assemblies and method of fabrication
Publication Date: 2023.11.28 NXP USA INC
  • US11830842B2 patent drawing
  • US11830842B2 patent drawing
  • US11830842B2 patent drawing

AI summary

A device assembly includes a functional substrate having one or more electronic components formed there. The functional substrate has a cavity extending from a first surface toward a second surface of the functional substrate at a location that lacks the electronic components. The device assembly further includes a semiconductor die placed within the cavity with a pad surface of the semiconductor die being opposite to a bottom of the cavity. The functional substrate may be formed utilizing a first fabrication technology and the semiconductor die may be formed utilizing a second fabrication technology that differs from the first fabrication technology.