Hybrid Substrate FinFET Crystal Orientation

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Solution Overview

Problem

Conventional hybrid substrate schemes for FinFET devices with fins of different sidewall crystalline orientations have not been entirely satisfactory in enhancing electron and hole mobility, leading to performance issues and fin height loss.

Innovation Solution

A hybrid substrate scheme is implemented where PMOS FinFET devices have a fin with a (100) crystal orientation top surface and a (110) crystal orientation sidewall, and NMOS FinFET devices have a fin with a (110) crystal orientation top surface and a (100) crystal orientation sidewall, with capping layers to improve interface state density and gate dielectric/semiconductor interface, ensuring equal fin heights for both devices.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If conventional hybrid substrate schemes are used with fins of different sidewall crystalline orientations, then device performance should be improved, but fin height loss occurs and interface state density increases

Engineering Contradiction:
Improvedevice performanceVSAvoidfin height
Core Design Contradiction:
ReliabilityVSManufacturing precision

Solution Approach 1:

The patent applies local quality by providing different crystal orientations at different locations on the substrate surface. Specifically, a first region has a first crystal orientation (e.g., <100>) optimized for NMOS devices, while a second region has a second crystal orientation (e.g., <110>) optimized for PMOS devices. This allows each device type to have optimal local properties without compromising the other, thereby improving overall device performance while maintaining precise fin height control through the unified substrate structure.

Inventive Principle:
Principle #3Local quality

2Reliability

If different sidewall crystalline orientations are used for PMOS and NMOS fins, then electron and hole mobility should be enhanced, but capacitor loss increases

Engineering Contradiction:
Improvecarrier mobilityVSAvoidcapacitor loss
Core Design Contradiction:
ReliabilityVSLoss of energy

Solution Approach 1:

The patent implements local quality by assigning specific crystal orientations to different device regions: <100> orientation for NMOS regions to enhance electron mobility, and <110> orientation for PMOS regions to enhance hole mobility. This localized optimization improves carrier mobility for each device type while the unified substrate and consistent fin formation process minimize capacitor loss by avoiding the fin height variations that occur in conventional separate substrate approaches.

Inventive Principle:
Principle #3Local quality

3Reliability

If hybrid substrate with different crystal orientations is implemented, then interface state density should be improved, but device complexity increases

Engineering Contradiction:
Improveinterface state densityVSAvoidsubstrate structure
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent merges multiple functions into a single unified substrate structure. The substrate simultaneously provides different crystal orientations for NMOS and PMOS devices, maintains uniform fin height across both device types, and ensures proper interface state density. This consolidation achieves the benefits of hybrid substrate schemes while reducing device complexity by eliminating the need for separate substrates or complex fin height adjustment mechanisms.

Inventive Principle:
Principle #5Merging (Combining)

Data Source

PatentUS10879242B2Method of manufacturing semiconductor device on hybrid substrate
Publication Date: 2020.12.29 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US10879242B2 patent drawing
  • US10879242B2 patent drawing
  • US10879242B2 patent drawing

AI summary

A semiconductor device includes PMOS and NMOS FinFET devices disposed on a hybrid substrate including a first substrate and a second substrate, in which a fin of the PMOS FinFET device is formed on the first substrate having a top surface with a (100) crystal orientation, and another fin of the NMOS FinFET device is formed on the second substrate having a top surface with a (110) crystal orientation. The semiconductor device further includes a capping layer enclosing a buried bottom portion of the fin of the PMOS FinFET device, and another capping layer enclosing an effective channel portion of the fin of the PMOS FinFET device.