Hybrid Substrate Stacking for Low-Warpage RDL Packaging
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Solution Overview
Problem
Semiconductor devices face issues with warpage during the formation of redistribution layers (RDL), leading to higher manufacturing costs and defects, particularly in larger fan-out devices, and embedded electrical components are prone to height constraints and cracking during grinding processes.
Innovation Solution
A method of stacking hybrid substrates with embedded electrical components, utilizing a multi-layered structure of conductive layers and insulating layers to form redistribution layers (RDL) on temporary carriers, followed by singulation and encapsulation to create high-density routing and interconnect structures.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If redistribution layers (RDL) are formed over semiconductor die to perform electrical functions, then electrical interconnect capability is improved, but warpage occurs during formation leading to lower yield and higher manufacturing costs
Solution Approach 1:
The patent divides the semiconductor device into multiple separate layers including semiconductor die, hybrid substrate, encapsulant, and molding compound. This segmentation allows each layer to be formed and controlled independently, preventing warpage that would occur if all electrical interconnect structures were formed as a single integrated unit on the semiconductor die.
Solution Approach 2:
The patent moves electrical interconnect structures from the traditional two-dimensional plane of the semiconductor die to a three-dimensional stacked architecture. By forming RDL on a separate hybrid substrate and stacking it with the semiconductor die, the solution provides electrical interconnect capability while eliminating the warpage issue that plagues planar RDL formation on large fan-out devices.
2Adaptability or versatility
If larger fan-out devices are manufactured with RDL, then electrical function is improved, but warpage risk increases leading to lower yield
Solution Approach 1:
By segmenting the device into separate stackable layers, the patent enables larger fan-out devices to achieve enhanced electrical functionality without the proportional increase in warpage risk. Each layer can be optimized independently, maintaining high yield even as device size and electrical complexity increase.
Solution Approach 2:
The patent changes the structural parameters from a single-planar architecture to a multi-layer stacked architecture. This parameter change allows the device to scale in electrical functionality (adaptability) while each individual layer maintains manageable dimensions that prevent warpage, thereby preserving productivity/yield.
3Adaptability or versatility
If embedded electrical components are integrated with the package, then functionality is improved, but height constraints and cracking concerns arise during grinding process
Solution Approach 1:
The patent performs preliminary actions by forming the hybrid substrate with embedded electrical components and RDL structures before the final packaging and grinding steps. This allows the substrate to be pre-strengthened and the embedded components to be securely integrated before they are subjected to the mechanical stresses of the grinding process, preventing cracking and maintaining structural integrity.
Solution Approach 2:
The patent uses composite material structures in the hybrid substrate, combining multiple materials with different mechanical properties. This composite construction provides both the electrical functionality needed for embedded components and the mechanical strength required to withstand the grinding process without cracking, resolving the contradiction between functionality and structural integrity.
4Reliability
If multi-layered structure with conductive and insulating layers is used to form RDL, then high-density interconnects are achieved, but manufacturing complexity increases
Solution Approach 1:
The patent segments the multi-layered structure into a standardized hybrid substrate module that can be manufactured once and then stacked with other modules. This segmentation reduces manufacturing complexity by allowing the complex multi-layered interconnect structure to be produced as a reusable component rather than assembling multiple complex layers for each device.
Solution Approach 2:
The hybrid substrate is designed as a universal platform that provides multiple functions: it serves as the mechanical support structure, contains the embedded electrical components, provides the RDL interconnect network, and enables stacking with multiple semiconductor die. This multi-functionality reduces overall manufacturing complexity by consolidating what would otherwise require multiple separate manufacturing processes into a single integrated substrate.
Data Source
AI summary
A semiconductor device has a first RDL substrate with first conductive pillars formed over a first surface of the first RDL substrate. A first electrical component is disposed over the first surface of the first RDL substrate. A hybrid substrate is bonded to the first RDL substrate. An encapsulant is deposited around the hybrid substrate and first RDL substrate with the first conductive pillars and first electrical component embedded within the encapsulant. A second RDL substrate with second conductive pillars formed over the second RDL substrate and second electrical component disposed over the second RDL substrate can be bonded to the hybrid substrate. A second RDL can be formed over a second surface of the first RDL substrate. A third electrical component is disposed over a second surface of the first RDL substrate. A shielding frame is disposed over the third electrical component.