Hybrid Multi-Layer Substrate Direct Bonding
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Solution Overview
Problem
Current packaging technologies for semiconductor chips are limited by the need for a shared substrate, which restricts miniaturization and integration, especially in flexible or irregular systems, as they require connectors or shared substrates for multi-layer substrate connections.
Innovation Solution
A hybrid structure of multi-layer substrates with alternating metal and dielectric layers and Via (VIA) connections allows direct interconnection of chip devices without a shared substrate, utilizing interface adhesion enhancement or weakening processes to increase or decrease adhesion intensity as needed, and incorporating a third substrate for additional connections.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of operation
If a shared package substrate is used to connect chip devices, then the connection between different kinds of chip devices is established, but the package volume increases and integration complexity increases
Solution Approach 1:
The invention extracts and eliminates the shared package substrate from the system by enabling direct bonding between multi-layer substrates. Each substrate independently connects to chip devices without requiring a common mounting board, thereby removing the volume contribution of the shared substrate while maintaining inter-device connectivity through direct substrate-to-substrate bonding interfaces.
Solution Approach 2:
The invention merges the connection function directly into the multi-layer substrate structure itself. By integrating through-substrate vias and bonding interfaces within each substrate, the connection capability is combined with the substrate body, eliminating the need for a separate shared package substrate and reducing overall package volume.
2Ease of operation
If connectors or shared substrates are used for multi-layer substrate connections, then the connection is established, but the package integration is reduced and flexibility is limited
Solution Approach 1:
The invention segments the packaging system into independent multi-layer substrate modules that can be directly bonded to each other. Each substrate maintains its structural integrity and connection capabilities independently, allowing for flexible arrangement and configuration of different chip devices without being constrained by a rigid shared substrate architecture.
Solution Approach 2:
The invention enables dynamic and flexible package configurations by allowing multi-layer substrates to be directly connected in various arrangements. The direct bonding interface between substrates provides adaptability for different packaging scenarios, enabling the system to accommodate varying numbers and types of chip devices without requiring a fixed shared substrate design.
3Ease of operation
If a shared package substrate is used, then different kinds of chip devices can be connected, but the microminiaturization of the whole system is restricted
Solution Approach 1:
The invention extracts the shared package substrate from the system architecture, allowing chip devices to be mounted directly on individual multi-layer substrates. This elimination of the shared substrate removes a significant volume component from the overall system, enabling microminiaturization while preserving the capability to connect different kinds of chip devices through direct substrate bonding.
Solution Approach 2:
The invention implements a nested structure where chip devices are mounted on multi-layer substrates that are directly bonded together in a stacked or integrated configuration. This nesting of functional elements eliminates the need for a separate shared substrate layer, reducing the overall system volume and enabling compact integration of multiple chip device types.
Data Source
AI summary
A hybrid structure of multi-layer substrates comprises a first multi-layer substrate and a second multi-layer substrate. The first multi-layer substrate stacks up first metal layers, first dielectric layers alternately and has VIAs. A border district of a first metal layer connects with a border district of the corresponding first dielectric layer. The border districts are separated from adjacent first metal layers and adjacent first dielectric layers. The second multi-layer substrate stacks up second metal layers and second dielectric layers alternately. A border district of a second metal layer connects with a border district of the corresponding second dielectric layer. The border districts are separated from adjacent second metal layers and adjacent second dielectric layers. The VIAs are located at the border districts of the first dielectric layers and each VIA has electric conductor therein to connect one first metal layer with one second metal layer.


