Hybrid Semiconductor Switch Topology for Fast Switching and Low Loss

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Solution Overview

Problem

Existing semiconductor switches, such as IGBTs and SiC MOSFETs, face inefficiencies at low to medium load conditions and are limited in scalability and integration with smart circuits, while GaN HEMTs struggle with driving voltage compatibility and reliability issues when paralleled with vertical devices.

Innovation Solution

A semiconductor switch combining a high-electron-mobility transistor (HEMT) with a vertical transistor device, such as an IGBT or SiC MOSFET, using a single control terminal and an interface circuit to achieve driving voltage compatibility, allowing monolithic integration of sensing and protection functions.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Loss of energy

If IGBTs are used for high voltage and high power applications, then the on-state resistance is reduced through conductivity modulation, but the switching speed becomes slow due to plasma buildup and removal

Engineering Contradiction:
Improveon-state resistanceVSAvoidswitching speed
Core Design Contradiction:
Loss of energyVSSpeed

Solution Approach 1:

The invention segments the switching function by using two parallel IGBTs with different current ratings - a first IGBT optimized for high current conduction and a second IGBT optimized for fast switching. This segmentation allows each device to specialize in one function, resolving the contradiction between low on-state resistance (requiring high current capability) and fast switching speed.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The invention dynamically switches between different IGBTs based on operating conditions. During turn-on and turn-off transients, the control circuit activates only the second IGBT for fast switching. During steady-state conduction, both IGBTs share the current to reduce on-state resistance. This dynamic allocation optimizes both switching speed and energy loss at different operational phases.

Inventive Principle:
Principle #15Dynamics

2Loss of energy

If the current rating ratio between first and second IGBTs is increased, then the on-state resistance is further reduced, but the voltage unbalance during transient increases

Engineering Contradiction:
Improveon-state resistanceVSAvoidvoltage unbalance
Core Design Contradiction:
Loss of energyVSStability of the object's composition

Solution Approach 1:

The control circuit implements feedback mechanisms to monitor and adjust the operating points of both IGBTs. During transient phases, the control circuit detects voltage unbalance and adjusts gate drive signals to maintain stability. This feedback allows the system to tolerate a wider range of current rating ratios while maintaining voltage balance, thus enabling lower on-state resistance without excessive voltage unbalance.

Inventive Principle:
Principle #23Feedback

3Speed

If GaN HEMTs are paralleled with vertical devices, then the switching speed is improved, but driving voltage compatibility and reliability issues arise

Engineering Contradiction:
Improveswitching speedVSAvoiddriving voltage compatibility
Core Design Contradiction:
SpeedVSReliability

Solution Approach 1:

The invention changes the voltage parameters of the parallel-connected devices by using different voltage ratings for the first and second IGBTs. The second IGBT has a lower voltage rating optimized for fast switching, while the first IGBT has a higher voltage rating for robust conduction. This parameter differentiation resolves the driving voltage compatibility issue while maintaining reliability, as each device operates within its optimized voltage range.

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS20250266826A1Semiconductor switch
Publication Date: 2025.08.21 CAMBRIDGE GAN DEVICES LIMITED
  • US20250266826A1 patent drawing
  • US20250266826A1 patent drawing
  • US20250266826A1 patent drawing

AI summary

A semiconductor switch comprising a first branch comprising a first lateral and/or wide bandgap semiconductor transistor device and a second lateral and/or wide bandgap semiconductor transistor device, the first lateral and/or wide bandgap semiconductor transistor device and the second lateral and/or wide bandgap semiconductor transistor device being connected in series; and a second branch comprising a vertical and/or silicon-based semiconductor transistor device; wherein the first branch and the second branch are connected in parallel; and wherein a maximum voltage rating of the vertical and/or silicon-based semiconductor transistor device is greater than a maximum voltage rating of the first and second lateral and/or wide bandgap semiconductor transistor devices.