Hybrid Threading Processor with Configurable Circuit Array
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Solution Overview
Problem
Existing computing systems face limitations in computation processing capabilities, including speed, energy consumption, and heat dissipation, making them inadequate for advanced computing applications such as artificial intelligence and graph analytics.
Innovation Solution
A hybrid computing architecture featuring a self-scheduling processor, configurable computing circuitry with an embedded interconnection network, dynamic reconfiguration, and dynamic control over energy or power consumption, enabling high-performance and energy-efficient solutions for compute-intensive kernels.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If existing computing systems are used to handle compute-intensive applications, then basic computation processing is maintained, but computation speed, energy efficiency, and heat dissipation performance deteriorate
Solution Approach 1:
The computing system is divided into multiple processing domains, each capable of independent operation. Each domain contains processing elements that can be individually configured and controlled, allowing parallel processing of compute-intensive tasks while distributing energy consumption and heat generation across multiple smaller units rather than concentrating them in a single processor
Solution Approach 2:
The system implements dynamic reconfiguration of processing elements and interconnection networks based on workload requirements. Processing domains can be dynamically created, modified, or deactivated to match actual computational needs, enabling the system to scale energy consumption according to productivity demands rather than maintaining fixed high-power operation
Solution Approach 3:
The patent changes operational parameters by allowing processing elements to operate at different performance levels and configurations. By adjusting the activation and configuration of processing domains, the system can optimize the balance between computation speed and energy consumption, selecting appropriate parameter settings based on the specific compute-intensive application being executed
2Speed
If processing power is increased to handle advanced computing applications, then computation speed improves, but heat dissipation problems worsen
Solution Approach 1:
By segmenting the processing system into multiple domains with distributed processing elements, the patent prevents concentration of heat generation in a single high-power processor. Each domain operates at lower individual power levels, reducing localized heat dissipation challenges while maintaining aggregate computation speed through parallel execution across domains
Solution Approach 2:
The system maintains continuous computational throughput by keeping multiple processing domains actively engaged in parallel tasks. This continuous utilization distributes heat generation over time and space, preventing thermal spikes that would occur with intermittent high-power operation in a single processor, while sustaining high overall computation speed
3Adaptability or versatility
If fixed-architecture processors are used, then device simplicity is maintained, but adaptability to different computing applications deteriorates
Solution Approach 1:
The patent implements universal processing elements that can be configured to perform multiple different computational functions. Each processing domain contains elements capable of executing various compute-intensive algorithms including FFTs, FIR filters, and graph analytics by reconfiguring their operational parameters and interconnection patterns, eliminating the need for separate dedicated hardware for each application type
Solution Approach 2:
The system achieves adaptability through dynamic reconfiguration of processing domains and interconnection networks. The architecture allows runtime modification of processing element connections and operational modes based on the specific application requirements, enabling a single system to adapt to different computing tasks without requiring complex static design for each possible application
4Productivity
If parallel processing is increased to improve performance, then productivity improves, but device complexity and control difficulty worsen
Solution Approach 1:
The patent manages parallel processing complexity by organizing processing elements into discrete, independently controllable domains. Each domain can be managed as a separate unit with its own resource allocation and scheduling, simplifying the control of parallel operations compared to managing individual processing elements separately, while still enabling high overall productivity through domain-level parallelism
Data Source
AI summary
Representative apparatus, method, and system embodiments are disclosed for configurable computing. In a representative embodiment, a system includes an interconnection network, a processor, a host interface, and a configurable circuit cluster. The configurable circuit cluster may include a plurality of configurable circuits arranged in an array; an asynchronous packet network and a synchronous network coupled to each configurable circuit of the array; and a memory interface circuit and a dispatch interface circuit coupled to the asynchronous packet network and to the interconnection network. Each configurable circuit includes instruction or configuration memories for selection of a current data path configuration, a master synchronous network input, and a data path configuration for a next configurable circuit.