Hybrid Front-End Transceiver Frequency Planning for Harmonics Control
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Solution Overview
Problem
Conventional architectures for 60 GHz front-end transceivers face challenges such as high power consumption, interference from harmonics and sub-harmonics, and difficulty in generating stable local oscillator signals, leading to performance degradation and increased complexity.
Innovation Solution
A 36G/24G transceiver architecture that combines features of super-heterodyne and direct conversion architectures, with carefully selected intermediate and local oscillator frequencies to avoid integer multiples overlap, reducing harmonics mixing and feedthrough, and using a hybrid structure to achieve low power consumption and improved image rejection.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If direct conversion architecture is used, then device complexity is reduced, but LO feedthrough and image rejection performance deteriorate
Solution Approach 1:
The transceiver is divided into two functional segments: a direct conversion receiver path for simplicity and a super-heterodyne transmitter path for performance. This segmentation allows each path to be optimized independently, with the receiver using simple direct conversion and the transmitter using complex super-heterodyne architecture to avoid LO feedthrough issues.
Solution Approach 2:
Different architecture styles are applied to different parts of the transceiver system. The receiver path uses direct conversion with I/Q imbalance compensation, while the transmitter path uses super-heterodyne architecture. This local quality approach allows each subsystem to have the optimal architecture for its specific requirements.
2Object-affected harmful factors
If super-heterodyne architecture is used, then image rejection is improved, but device complexity and power consumption increase
Solution Approach 1:
The transceiver is divided into two functional segments: a direct conversion receiver path for simplicity and a super-heterodyne transmitter path for performance. This segmentation allows each path to be optimized independently, with the receiver using simple direct conversion and the transmitter using complex super-heterodyne architecture to avoid LO feedthrough issues.
Solution Approach 2:
The patent merges direct conversion and super-heterodyne architectures into a single transceiver system. The receiver uses direct conversion while the transmitter uses super-heterodyne, combining the advantages of both approaches in one unified system to achieve both simplicity and performance.
3Device complexity
If frequency planning with integer multiples is used, then frequency synthesis is simplified, but harmonics interference increases
Solution Approach 1:
The patent changes the frequency relationship parameters from integer multiples to non-integer ratios. Specifically, the LO frequency is set to 36 GHz and the IF frequency to 24 GHz, creating a 3:2 ratio relationship. This parameter change avoids harmonics interference while maintaining manageable frequency synthesis complexity.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The 36G/24G architecture achieves reduced power consumption, improved image rejection, and simplified design, enhancing communication performance while minimizing interference and DC offset, and allows for the reuse of existing 24 GHz IP, resulting in a compact and cost-effective transceiver solution.
Implementation Method 1
a first receiver frequency converter configured to convert a received signal with a receiver frequency into a first receiver intermediate signal with a first receiver intermediate frequency
Implementation Method 2
an oscillator signal generator respectively coupled to the first receiver frequency converter and to the receiver direct conversion stage so as to provide a first oscillator signal with a first oscillator frequency
Data Source
AI summary
In an embodiment, a front-end transceiver may be provided. The front-end transceiver may include a receiver path, including a first receiver frequency converter configured to convert a received signal with a receiver frequency into a first receiver intermediate signal with a first receiver intermediate frequency; and a receiver direct conversion stage coupled to the first receiver frequency converter so as to receive the first receiver intermediate signal. The front-end transceiver may further include an oscillator signal generator respectively coupled to the first receiver frequency converter and to the receiver direct conversion stage so as to provide a first oscillator signal with a first oscillator frequency to the first receiver frequency converter and a first stabilizing signal with a first stabilizing frequency to the receiver direct conversion stage; wherein the oscillator signal generator may be configured so that the first oscillator frequency of the first oscillator signal may be selected such that any integer multiple of the first oscillator frequency of the first oscillator signal may be different from any integer multiple of the receiver frequency of the received signal. The front-end transceiver may also include a transmitter path.