Hybrid Transistor with Segmented Current Paths for Memory Programming
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Solution Overview
Problem
Conventional metal-oxide-semiconductor field-effect transistors (MOSFETs) face challenges in achieving high hot carrier injection efficiency for fast programming in non-volatile memory devices due to the trade-off between lateral and vertical electric fields, resulting in low injection efficiency and increased power consumption.
Innovation Solution
A hybrid transistor design incorporating a floating gate with first and second current paths, where the sub-transistors are configured as a metal oxide semiconductor (MOS) and impact ionization (I-MOS) transistors, respectively, allowing for the generation of strong lateral electric fields through impact ionization and enhanced hot carrier injection efficiency by applying appropriate voltages to control the sub-transistors for programming and reading.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If gate voltage is increased to increase vertical electric field, then electron attraction to gate is improved, but lateral electric field decreases resulting in low injection efficiency
Solution Approach 1:
The transistor channel is segmented into two distinct current paths: a first current path optimized for hot carrier injection during programming, and a second current path optimized for reading operations. This segmentation allows each path to be independently optimized for its specific function, resolving the contradiction between injection efficiency and power consumption by preventing the need to increase gate voltage for reading operations.
Solution Approach 2:
The transistor dynamically switches between two operational modes by controlling which current path is active. During programming, the first current path is activated to generate strong lateral electric fields for hot carrier injection. During reading, the second current path is activated to provide low power operation while maintaining sufficient current flow, thus dynamically adapting to different operational requirements without compromising injection efficiency or increasing power consumption.
2Reliability
If conventional MOSFET structure is used, then device simplicity is maintained, but hot carrier injection efficiency is low due to trade-off between lateral and vertical electric fields
Solution Approach 1:
The transistor is divided into two sub-transistors sharing a common gate, with each sub-transistor providing a separate current path. The first sub-transistor has source and drain regions configured for hot carrier injection, while the second sub-transistor has source and drain regions configured for low power reading. This segmentation enables high programming speed through optimized hot carrier injection while maintaining reasonable structural complexity by sharing the gate and substrate.
Solution Approach 2:
Different regions of the transistor are given different properties: the first current path region is optimized with specific source and drain configurations for generating strong lateral electric fields and hot carrier injection, while the second current path region is optimized for low power operation. This local differentiation of properties allows the device to achieve high programming speed in the first path without compromising the overall device complexity.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The hybrid transistor design significantly enhances programming speed and reliability by increasing hot carrier injection efficiency, reducing read disturb, and improving the overall performance of non-volatile memory devices while maintaining low power consumption.
Implementation Method 1
Impact ionization is a phenomenon where an energetic charge carrier loses energy by the creation of other charge carriers. In particular, in semiconductors, an electron (or hole) with enough kinetic energy can transfer its energy to an electron in the valence band, and promote it to the conduction band, hence creating an electron-hole pair.
Data Source
AI summary
A method of forming a device is disclosed. The method includes providing a substrate having an active area. A gate is formed on the substrate. First and second current paths through the gate are formed. The first current path serves a first purpose and the second current path serves a second purpose. The gate controls selection of the current paths.