Hybrid Video Decoder Fast Switching Mechanism
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Solution Overview
Problem
Existing video decoders face issues with hardware accelerators being fixed to specific codec standards, leading to failures during Network Abstraction Layer (NAL) processing, resulting in poor user experience due to inability to handle variable bandwidth and network customization options effectively.
Innovation Solution
A hybrid video decoder that rapidly switches between hardware and software decoders using buffers to store and process video bit streams, allowing seamless decoding by routing the bit stream to either decoder based on analysis of NAL data, thereby minimizing disruption to the user experience.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If a hardware accelerator is used for video decoding, then decoding speed and energy efficiency are improved, but adaptability to different codec standards and NAL variations deteriorates
Solution Approach 1:
The system dynamically switches between hardware and software decoders based on the capabilities of the hardware accelerator and the requirements of the incoming video bit stream. The switching controller monitors whether the hardware decoder can handle the current codec standard and NAL variations, and transitions to software decoding when incompatibility is detected, ensuring both speed and adaptability.
Solution Approach 2:
The hybrid video decoder combines multiple decoding approaches (hardware and software) into a single universal system. The hardware accelerator handles supported codec standards for high-speed decoding, while the software decoder provides fallback capability for unsupported standards, making the system universally compatible with various codec standards and NAL variations.
2Use of energy by moving object
If a hardware decoder is used, then energy efficiency is improved, but reliability during NAL processing deteriorates due to failures
Solution Approach 1:
The switching controller proactively monitors the capabilities of the hardware decoder and prepares for potential failures by having a software decoder ready as a backup. When the hardware decoder encounters incompatible NAL processing requirements, the system seamlessly transitions to software decoding, preventing playback interruptions and ensuring continuous reliable operation.
Solution Approach 2:
The switching controller acts as an intermediary between the hardware decoder and the software decoder, managing the transition between them. It monitors the hardware decoder's performance and compatibility, and when reliability issues are detected during NAL processing, it redirects the video bit stream to the software decoder, ensuring uninterrupted and reliable video playback.
3Ease of operation
If fast switching between decoders is implemented, then user experience is improved, but device complexity increases
Solution Approach 1:
The switching controller extracts the decision-making logic from the decoding process itself, separating the control function from the execution function. This modular approach allows the hardware and software decoders to remain independent while the controller manages their coordination, reducing overall system complexity despite the dual-decoder architecture.
Data Source
AI summary
Techniques are presented herein for switching between a software decoder and a hardware decoder in a hybrid decoder. A video bit stream is received. The video bit stream is analyzed to determine whether or not the video bit stream can be decoded by the hardware decoder. When the video bit stream can be decoded by the hardware decoder, the video bit stream is routed to the hardware decoder and also stored in a first buffer. The video bit stream is decoded by the hardware decoder and when a reference frame is decoded, the reference frame is stored in a second buffer. When the video bit stream cannot be decoded by the hardware decoder, the video bit stream is routed to the software decoder for decoding. When an instantaneous decoder refresh (IDR) frame is decoded by the software decoder, the IDR frame is stored in the first buffer.