Hybrid Video Encoder Parallel Pipelined Processing
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Solution Overview
Problem
Existing video encoding technologies for mobile devices face challenges in achieving real-time processing while maintaining flexibility with evolving video standards and power efficiency, as dedicated hardware solutions lack flexibility and purely software-based solutions are insufficient for high-resolution encoding.
Innovation Solution
A method and apparatus for combined parallel and pipelined video encoding, dividing frames into horizontal sections for efficient processing, using a combination of software and dedicated hardware, where each frame is divided into four sections for parallel processing, with intra-estimation and motion prediction to minimize data dependency and synchronization overhead.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If dedicated hardware solution is used for video encoding, then processing performance and power efficiency are improved, but flexibility to adapt to changing video standards and parameters deteriorates
Solution Approach 1:
The video encoding system is segmented into multiple independent processing units, each handling specific encoding tasks (motion estimation, DCT, quantization, etc.). This allows the system to achieve hardware-level parallel processing performance while maintaining software-level flexibility, as processing units can be dynamically configured and allocated based on different encoding standards and requirements.
2Adaptability or versatility
If purely software-based solution is used for video encoding, then flexibility to adapt to changing standards is improved, but processing speed for high-resolution real-time encoding deteriorates
Solution Approach 1:
A buffer memory system acts as an intermediary between software control and hardware processing units. The buffer manages data flow and synchronization between the flexible software layer and the high-speed hardware parallel processing units, enabling both flexibility and high processing speed to coexist in the hybrid architecture.
3Productivity
If CPU frequency is increased to improve processing performance, then encoding speed is improved, but power consumption increases leading to poor battery life
Solution Approach 1:
The patent replaces the sequential mechanical processing of a single high-frequency CPU with a parallel processing system using multiple lower-frequency processing units working simultaneously. This substitution reduces overall power consumption while maintaining high encoding throughput, as parallel processing at lower frequencies is more energy-efficient than sequential processing at high frequencies.
4Productivity
If parallel processing is implemented in software form, then processing capability is improved, but data dependency in video encoding algorithms makes it difficult to realize benefit of multiple CPUs
Solution Approach 1:
The patent implements dynamic task allocation and data flow management in the parallel processing system. Processing units can dynamically adjust their operations based on data availability and dependency requirements, allowing the system to effectively handle the inherent data dependencies in video encoding algorithms while maximizing the utilization of multiple processing units.
Data Source
AI summary
A method of encoding video data including a sequence of digital image frames, in a pipelined processing system is provided. The method includes dividing each frame in the sequence into a plurality of sections, each section including a horizontal band across a frame. The method further includes subdividing each section into a plurality of macroblocks, and encoding a representation of each macroblock in each section to form an output stream. The sections of each frame are processed during adjacent steps in a pipeline of the pipelined processing system.