Hybrid Voltage Calibration for Semiconductor Undervoltage Detection

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Solution Overview

Problem

Current semiconductor circuit technologies face challenges in detecting small voltage fluctuations due to limited voltage resolution in Chip Power Model (CPM) and inability to accurately determine absolute voltage levels with distributed delayed instruction per cycle (dIPC), leading to inefficiencies in detecting undervoltage conditions.

Innovation Solution

A semiconductor circuit that combines low-resolution accurate measurements from CPM with high-resolution inaccurate measurements from dIPC to calibrate a metric for faster and more accurate detection of undervoltage conditions, using a throttle signal generator to throttle subcircuits based on the calibrated metric.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If Chip Power Model (CPM) is used for voltage measurement, then absolute voltage level accuracy is improved, but voltage resolution is limited (approximately 20 mV)

Engineering Contradiction:
Improveabsolute voltage level accuracyVSAvoidvoltage resolution
Core Design Contradiction:
Measurement precisionVSManufacturing precision

Solution Approach 1:

The patent combines CPM (which provides accurate absolute voltage levels but limited resolution) with distributed dIPC (which provides high resolution voltage fluctuations but inaccurate absolute levels) into a hybrid measurement system. The calibration circuit merges these two measurement approaches to achieve both high resolution and accurate absolute voltage measurement, resolving the contradiction between measurement precision and manufacturing precision.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The calibration circuit acts as an intermediary that translates and calibrates the high-resolution but inaccurate dIPC measurements using the accurate CPM measurements as reference. This mediator component enables the system to achieve both high resolution and accuracy by bridging the gap between the two measurement systems.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Manufacturing precision

If distributed delayed instruction per cycle (dIPC) is used for voltage measurement, then voltage fluctuation detection resolution is improved (approximately 1 mV), but absolute voltage level accuracy deteriorates

Engineering Contradiction:
Improvevoltage fluctuation detection resolutionVSAvoidabsolute voltage level accuracy
Core Design Contradiction:
Manufacturing precisionVSMeasurement precision

Solution Approach 1:

The calibration circuit uses feedback from the CPM measurements to continuously adjust and calibrate the dIPC measurements. The accurate absolute voltage levels from CPM serve as feedback reference to correct the absolute level inaccuracies in dIPC, while preserving dIPC's high resolution advantage for detecting voltage fluctuations.

Inventive Principle:
Principle #23Feedback

Solution Approach 2:

The calibration circuit serves as an intermediary that processes dIPC's high-resolution measurements and adjusts them using CPM's accurate absolute references, enabling the system to achieve both high resolution and accuracy.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Speed

If traditional voltage detection methods are used, then detection speed is limited, but if hybrid measurement is implemented, then undervoltage condition detection speed is improved

Engineering Contradiction:
Improveundervoltage condition detection speedVSAvoidmeasurement system complexity
Core Design Contradiction:
SpeedVSDevice complexity

Solution Approach 1:

The patent merges CPM and distributed dIPC into a hybrid measurement system that leverages the speed advantages of dIPC for detecting voltage fluctuations while using CPM for accurate absolute level verification. This combination achieves faster undervoltage detection compared to traditional single-method approaches.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The system performs preliminary high-resolution monitoring using dIPC to detect potential undervoltage conditions early, then uses CPM to confirm absolute voltage levels when needed. This preliminary action approach enables faster detection response while maintaining measurement accuracy.

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS11586267B2Fine resolution on-chip voltage simulation to prevent under voltage conditions
Publication Date: 2023.02.21 INTERNATIONAL BUSINESS MACHINE CORPORATION
  • US11586267B2 patent drawing
  • US11586267B2 patent drawing
  • US11586267B2 patent drawing

AI summary

Embodiments of the present disclosure relate to managing power provided to a semiconductor circuit to prevent undervoltage conditions. A measured voltage value describing a measured supply voltage at a first subcircuit of a semiconductor circuit can be received, the measured voltage value having a first resolution. A selected metric indicative of a supply voltage present at the first subcircuit can be received, the selected metric having a second resolution higher than the first resolution. The selected metric is calibrated to obtain a calibrated metric when a transition of the measured voltage value occurs.